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0009 #ifndef __LINUX_MFD_MAX77714_H_
0010 #define __LINUX_MFD_MAX77714_H_
0011
0012 #include <linux/bits.h>
0013
0014 #define MAX77714_INT_TOP 0x00
0015 #define MAX77714_INT_TOPM 0x07
0016
0017 #define MAX77714_INT_TOP_ONOFF BIT(1)
0018 #define MAX77714_INT_TOP_RTC BIT(3)
0019 #define MAX77714_INT_TOP_GPIO BIT(4)
0020 #define MAX77714_INT_TOP_LDO BIT(5)
0021 #define MAX77714_INT_TOP_SD BIT(6)
0022 #define MAX77714_INT_TOP_GLBL BIT(7)
0023
0024 #define MAX77714_32K_STATUS 0x30
0025 #define MAX77714_32K_STATUS_SIOSCOK BIT(5)
0026 #define MAX77714_32K_STATUS_XOSCOK BIT(4)
0027 #define MAX77714_32K_STATUS_32KSOURCE BIT(3)
0028 #define MAX77714_32K_STATUS_32KLOAD_MSK 0x3
0029 #define MAX77714_32K_STATUS_32KLOAD_SHF 1
0030 #define MAX77714_32K_STATUS_CRYSTAL_CFG BIT(0)
0031
0032 #define MAX77714_32K_CONFIG 0x31
0033 #define MAX77714_32K_CONFIG_XOSC_RETRY BIT(4)
0034
0035 #define MAX77714_CNFG_GLBL2 0x91
0036 #define MAX77714_WDTEN BIT(2)
0037 #define MAX77714_WDTSLPC BIT(3)
0038 #define MAX77714_TWD_MASK 0x3
0039 #define MAX77714_TWD_2s 0x0
0040 #define MAX77714_TWD_16s 0x1
0041 #define MAX77714_TWD_64s 0x2
0042 #define MAX77714_TWD_128s 0x3
0043
0044 #define MAX77714_CNFG_GLBL3 0x92
0045 #define MAX77714_WDTC BIT(0)
0046
0047 #define MAX77714_CNFG2_ONOFF 0x94
0048 #define MAX77714_WD_RST_WK BIT(5)
0049
0050
0051 enum {
0052 MAX77714_IRQ_TOP_ONOFF,
0053 MAX77714_IRQ_TOP_RTC,
0054 MAX77714_IRQ_TOP_GPIO,
0055 MAX77714_IRQ_TOP_LDO,
0056 MAX77714_IRQ_TOP_SD,
0057 MAX77714_IRQ_TOP_GLBL,
0058 };
0059
0060 #endif