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0001 /* SPDX-License-Identifier: GPL-2.0+ */
0002 /*
0003  * max77686-private.h - Voltage regulator driver for the Maxim 77686/802
0004  *
0005  *  Copyright (C) 2012 Samsung Electrnoics
0006  *  Chiwoong Byun <woong.byun@samsung.com>
0007  */
0008 
0009 #ifndef __LINUX_MFD_MAX77686_PRIV_H
0010 #define __LINUX_MFD_MAX77686_PRIV_H
0011 
0012 #include <linux/i2c.h>
0013 #include <linux/regmap.h>
0014 #include <linux/module.h>
0015 
0016 #define MAX77686_REG_INVALID        (0xff)
0017 
0018 /* MAX77686 PMIC registers */
0019 enum max77686_pmic_reg {
0020     MAX77686_REG_DEVICE_ID      = 0x00,
0021     MAX77686_REG_INTSRC     = 0x01,
0022     MAX77686_REG_INT1       = 0x02,
0023     MAX77686_REG_INT2       = 0x03,
0024 
0025     MAX77686_REG_INT1MSK        = 0x04,
0026     MAX77686_REG_INT2MSK        = 0x05,
0027 
0028     MAX77686_REG_STATUS1        = 0x06,
0029     MAX77686_REG_STATUS2        = 0x07,
0030 
0031     MAX77686_REG_PWRON      = 0x08,
0032     MAX77686_REG_ONOFF_DELAY    = 0x09,
0033     MAX77686_REG_MRSTB      = 0x0A,
0034     /* Reserved: 0x0B-0x0F */
0035 
0036     MAX77686_REG_BUCK1CTRL      = 0x10,
0037     MAX77686_REG_BUCK1OUT       = 0x11,
0038     MAX77686_REG_BUCK2CTRL1     = 0x12,
0039     MAX77686_REG_BUCK234FREQ    = 0x13,
0040     MAX77686_REG_BUCK2DVS1      = 0x14,
0041     MAX77686_REG_BUCK2DVS2      = 0x15,
0042     MAX77686_REG_BUCK2DVS3      = 0x16,
0043     MAX77686_REG_BUCK2DVS4      = 0x17,
0044     MAX77686_REG_BUCK2DVS5      = 0x18,
0045     MAX77686_REG_BUCK2DVS6      = 0x19,
0046     MAX77686_REG_BUCK2DVS7      = 0x1A,
0047     MAX77686_REG_BUCK2DVS8      = 0x1B,
0048     MAX77686_REG_BUCK3CTRL1     = 0x1C,
0049     /* Reserved: 0x1D */
0050     MAX77686_REG_BUCK3DVS1      = 0x1E,
0051     MAX77686_REG_BUCK3DVS2      = 0x1F,
0052     MAX77686_REG_BUCK3DVS3      = 0x20,
0053     MAX77686_REG_BUCK3DVS4      = 0x21,
0054     MAX77686_REG_BUCK3DVS5      = 0x22,
0055     MAX77686_REG_BUCK3DVS6      = 0x23,
0056     MAX77686_REG_BUCK3DVS7      = 0x24,
0057     MAX77686_REG_BUCK3DVS8      = 0x25,
0058     MAX77686_REG_BUCK4CTRL1     = 0x26,
0059     /* Reserved: 0x27 */
0060     MAX77686_REG_BUCK4DVS1      = 0x28,
0061     MAX77686_REG_BUCK4DVS2      = 0x29,
0062     MAX77686_REG_BUCK4DVS3      = 0x2A,
0063     MAX77686_REG_BUCK4DVS4      = 0x2B,
0064     MAX77686_REG_BUCK4DVS5      = 0x2C,
0065     MAX77686_REG_BUCK4DVS6      = 0x2D,
0066     MAX77686_REG_BUCK4DVS7      = 0x2E,
0067     MAX77686_REG_BUCK4DVS8      = 0x2F,
0068     MAX77686_REG_BUCK5CTRL      = 0x30,
0069     MAX77686_REG_BUCK5OUT       = 0x31,
0070     MAX77686_REG_BUCK6CTRL      = 0x32,
0071     MAX77686_REG_BUCK6OUT       = 0x33,
0072     MAX77686_REG_BUCK7CTRL      = 0x34,
0073     MAX77686_REG_BUCK7OUT       = 0x35,
0074     MAX77686_REG_BUCK8CTRL      = 0x36,
0075     MAX77686_REG_BUCK8OUT       = 0x37,
0076     MAX77686_REG_BUCK9CTRL      = 0x38,
0077     MAX77686_REG_BUCK9OUT       = 0x39,
0078     /* Reserved: 0x3A-0x3F */
0079 
0080     MAX77686_REG_LDO1CTRL1      = 0x40,
0081     MAX77686_REG_LDO2CTRL1      = 0x41,
0082     MAX77686_REG_LDO3CTRL1      = 0x42,
0083     MAX77686_REG_LDO4CTRL1      = 0x43,
0084     MAX77686_REG_LDO5CTRL1      = 0x44,
0085     MAX77686_REG_LDO6CTRL1      = 0x45,
0086     MAX77686_REG_LDO7CTRL1      = 0x46,
0087     MAX77686_REG_LDO8CTRL1      = 0x47,
0088     MAX77686_REG_LDO9CTRL1      = 0x48,
0089     MAX77686_REG_LDO10CTRL1     = 0x49,
0090     MAX77686_REG_LDO11CTRL1     = 0x4A,
0091     MAX77686_REG_LDO12CTRL1     = 0x4B,
0092     MAX77686_REG_LDO13CTRL1     = 0x4C,
0093     MAX77686_REG_LDO14CTRL1     = 0x4D,
0094     MAX77686_REG_LDO15CTRL1     = 0x4E,
0095     MAX77686_REG_LDO16CTRL1     = 0x4F,
0096     MAX77686_REG_LDO17CTRL1     = 0x50,
0097     MAX77686_REG_LDO18CTRL1     = 0x51,
0098     MAX77686_REG_LDO19CTRL1     = 0x52,
0099     MAX77686_REG_LDO20CTRL1     = 0x53,
0100     MAX77686_REG_LDO21CTRL1     = 0x54,
0101     MAX77686_REG_LDO22CTRL1     = 0x55,
0102     MAX77686_REG_LDO23CTRL1     = 0x56,
0103     MAX77686_REG_LDO24CTRL1     = 0x57,
0104     MAX77686_REG_LDO25CTRL1     = 0x58,
0105     MAX77686_REG_LDO26CTRL1     = 0x59,
0106     /* Reserved: 0x5A-0x5F */
0107     MAX77686_REG_LDO1CTRL2      = 0x60,
0108     MAX77686_REG_LDO2CTRL2      = 0x61,
0109     MAX77686_REG_LDO3CTRL2      = 0x62,
0110     MAX77686_REG_LDO4CTRL2      = 0x63,
0111     MAX77686_REG_LDO5CTRL2      = 0x64,
0112     MAX77686_REG_LDO6CTRL2      = 0x65,
0113     MAX77686_REG_LDO7CTRL2      = 0x66,
0114     MAX77686_REG_LDO8CTRL2      = 0x67,
0115     MAX77686_REG_LDO9CTRL2      = 0x68,
0116     MAX77686_REG_LDO10CTRL2     = 0x69,
0117     MAX77686_REG_LDO11CTRL2     = 0x6A,
0118     MAX77686_REG_LDO12CTRL2     = 0x6B,
0119     MAX77686_REG_LDO13CTRL2     = 0x6C,
0120     MAX77686_REG_LDO14CTRL2     = 0x6D,
0121     MAX77686_REG_LDO15CTRL2     = 0x6E,
0122     MAX77686_REG_LDO16CTRL2     = 0x6F,
0123     MAX77686_REG_LDO17CTRL2     = 0x70,
0124     MAX77686_REG_LDO18CTRL2     = 0x71,
0125     MAX77686_REG_LDO19CTRL2     = 0x72,
0126     MAX77686_REG_LDO20CTRL2     = 0x73,
0127     MAX77686_REG_LDO21CTRL2     = 0x74,
0128     MAX77686_REG_LDO22CTRL2     = 0x75,
0129     MAX77686_REG_LDO23CTRL2     = 0x76,
0130     MAX77686_REG_LDO24CTRL2     = 0x77,
0131     MAX77686_REG_LDO25CTRL2     = 0x78,
0132     MAX77686_REG_LDO26CTRL2     = 0x79,
0133     /* Reserved: 0x7A-0x7D */
0134 
0135     MAX77686_REG_BBAT_CHG       = 0x7E,
0136     MAX77686_REG_32KHZ      = 0x7F,
0137 
0138     MAX77686_REG_PMIC_END       = 0x80,
0139 };
0140 
0141 enum max77686_rtc_reg {
0142     MAX77686_RTC_INT        = 0x00,
0143     MAX77686_RTC_INTM       = 0x01,
0144     MAX77686_RTC_CONTROLM       = 0x02,
0145     MAX77686_RTC_CONTROL        = 0x03,
0146     MAX77686_RTC_UPDATE0        = 0x04,
0147     /* Reserved: 0x5 */
0148     MAX77686_WTSR_SMPL_CNTL     = 0x06,
0149     MAX77686_RTC_SEC        = 0x07,
0150     MAX77686_RTC_MIN        = 0x08,
0151     MAX77686_RTC_HOUR       = 0x09,
0152     MAX77686_RTC_WEEKDAY        = 0x0A,
0153     MAX77686_RTC_MONTH      = 0x0B,
0154     MAX77686_RTC_YEAR       = 0x0C,
0155     MAX77686_RTC_MONTHDAY       = 0x0D,
0156     MAX77686_ALARM1_SEC     = 0x0E,
0157     MAX77686_ALARM1_MIN     = 0x0F,
0158     MAX77686_ALARM1_HOUR        = 0x10,
0159     MAX77686_ALARM1_WEEKDAY     = 0x11,
0160     MAX77686_ALARM1_MONTH       = 0x12,
0161     MAX77686_ALARM1_YEAR        = 0x13,
0162     MAX77686_ALARM1_DATE        = 0x14,
0163     MAX77686_ALARM2_SEC     = 0x15,
0164     MAX77686_ALARM2_MIN     = 0x16,
0165     MAX77686_ALARM2_HOUR        = 0x17,
0166     MAX77686_ALARM2_WEEKDAY     = 0x18,
0167     MAX77686_ALARM2_MONTH       = 0x19,
0168     MAX77686_ALARM2_YEAR        = 0x1A,
0169     MAX77686_ALARM2_DATE        = 0x1B,
0170 };
0171 
0172 /* MAX77802 PMIC registers */
0173 enum max77802_pmic_reg {
0174     MAX77802_REG_DEVICE_ID      = 0x00,
0175     MAX77802_REG_INTSRC     = 0x01,
0176     MAX77802_REG_INT1       = 0x02,
0177     MAX77802_REG_INT2       = 0x03,
0178 
0179     MAX77802_REG_INT1MSK        = 0x04,
0180     MAX77802_REG_INT2MSK        = 0x05,
0181 
0182     MAX77802_REG_STATUS1        = 0x06,
0183     MAX77802_REG_STATUS2        = 0x07,
0184 
0185     MAX77802_REG_PWRON      = 0x08,
0186     /* Reserved: 0x09 */
0187     MAX77802_REG_MRSTB      = 0x0A,
0188     MAX77802_REG_EPWRHOLD       = 0x0B,
0189     /* Reserved: 0x0C-0x0D */
0190     MAX77802_REG_BOOSTCTRL      = 0x0E,
0191     MAX77802_REG_BOOSTOUT       = 0x0F,
0192 
0193     MAX77802_REG_BUCK1CTRL      = 0x10,
0194     MAX77802_REG_BUCK1DVS1      = 0x11,
0195     MAX77802_REG_BUCK1DVS2      = 0x12,
0196     MAX77802_REG_BUCK1DVS3      = 0x13,
0197     MAX77802_REG_BUCK1DVS4      = 0x14,
0198     MAX77802_REG_BUCK1DVS5      = 0x15,
0199     MAX77802_REG_BUCK1DVS6      = 0x16,
0200     MAX77802_REG_BUCK1DVS7      = 0x17,
0201     MAX77802_REG_BUCK1DVS8      = 0x18,
0202     /* Reserved: 0x19 */
0203     MAX77802_REG_BUCK2CTRL1     = 0x1A,
0204     MAX77802_REG_BUCK2CTRL2     = 0x1B,
0205     MAX77802_REG_BUCK2PHTRAN    = 0x1C,
0206     MAX77802_REG_BUCK2DVS1      = 0x1D,
0207     MAX77802_REG_BUCK2DVS2      = 0x1E,
0208     MAX77802_REG_BUCK2DVS3      = 0x1F,
0209     MAX77802_REG_BUCK2DVS4      = 0x20,
0210     MAX77802_REG_BUCK2DVS5      = 0x21,
0211     MAX77802_REG_BUCK2DVS6      = 0x22,
0212     MAX77802_REG_BUCK2DVS7      = 0x23,
0213     MAX77802_REG_BUCK2DVS8      = 0x24,
0214     /* Reserved: 0x25-0x26 */
0215     MAX77802_REG_BUCK3CTRL1     = 0x27,
0216     MAX77802_REG_BUCK3DVS1      = 0x28,
0217     MAX77802_REG_BUCK3DVS2      = 0x29,
0218     MAX77802_REG_BUCK3DVS3      = 0x2A,
0219     MAX77802_REG_BUCK3DVS4      = 0x2B,
0220     MAX77802_REG_BUCK3DVS5      = 0x2C,
0221     MAX77802_REG_BUCK3DVS6      = 0x2D,
0222     MAX77802_REG_BUCK3DVS7      = 0x2E,
0223     MAX77802_REG_BUCK3DVS8      = 0x2F,
0224     /* Reserved: 0x30-0x36 */
0225     MAX77802_REG_BUCK4CTRL1     = 0x37,
0226     MAX77802_REG_BUCK4DVS1      = 0x38,
0227     MAX77802_REG_BUCK4DVS2      = 0x39,
0228     MAX77802_REG_BUCK4DVS3      = 0x3A,
0229     MAX77802_REG_BUCK4DVS4      = 0x3B,
0230     MAX77802_REG_BUCK4DVS5      = 0x3C,
0231     MAX77802_REG_BUCK4DVS6      = 0x3D,
0232     MAX77802_REG_BUCK4DVS7      = 0x3E,
0233     MAX77802_REG_BUCK4DVS8      = 0x3F,
0234     /* Reserved: 0x40 */
0235     MAX77802_REG_BUCK5CTRL      = 0x41,
0236     MAX77802_REG_BUCK5OUT       = 0x42,
0237     /* Reserved: 0x43 */
0238     MAX77802_REG_BUCK6CTRL      = 0x44,
0239     MAX77802_REG_BUCK6DVS1      = 0x45,
0240     MAX77802_REG_BUCK6DVS2      = 0x46,
0241     MAX77802_REG_BUCK6DVS3      = 0x47,
0242     MAX77802_REG_BUCK6DVS4      = 0x48,
0243     MAX77802_REG_BUCK6DVS5      = 0x49,
0244     MAX77802_REG_BUCK6DVS6      = 0x4A,
0245     MAX77802_REG_BUCK6DVS7      = 0x4B,
0246     MAX77802_REG_BUCK6DVS8      = 0x4C,
0247     /* Reserved: 0x4D */
0248     MAX77802_REG_BUCK7CTRL      = 0x4E,
0249     MAX77802_REG_BUCK7OUT       = 0x4F,
0250     /* Reserved: 0x50 */
0251     MAX77802_REG_BUCK8CTRL      = 0x51,
0252     MAX77802_REG_BUCK8OUT       = 0x52,
0253     /* Reserved: 0x53 */
0254     MAX77802_REG_BUCK9CTRL      = 0x54,
0255     MAX77802_REG_BUCK9OUT       = 0x55,
0256     /* Reserved: 0x56 */
0257     MAX77802_REG_BUCK10CTRL     = 0x57,
0258     MAX77802_REG_BUCK10OUT      = 0x58,
0259 
0260     /* Reserved: 0x59-0x5F */
0261 
0262     MAX77802_REG_LDO1CTRL1      = 0x60,
0263     MAX77802_REG_LDO2CTRL1      = 0x61,
0264     MAX77802_REG_LDO3CTRL1      = 0x62,
0265     MAX77802_REG_LDO4CTRL1      = 0x63,
0266     MAX77802_REG_LDO5CTRL1      = 0x64,
0267     MAX77802_REG_LDO6CTRL1      = 0x65,
0268     MAX77802_REG_LDO7CTRL1      = 0x66,
0269     MAX77802_REG_LDO8CTRL1      = 0x67,
0270     MAX77802_REG_LDO9CTRL1      = 0x68,
0271     MAX77802_REG_LDO10CTRL1     = 0x69,
0272     MAX77802_REG_LDO11CTRL1     = 0x6A,
0273     MAX77802_REG_LDO12CTRL1     = 0x6B,
0274     MAX77802_REG_LDO13CTRL1     = 0x6C,
0275     MAX77802_REG_LDO14CTRL1     = 0x6D,
0276     MAX77802_REG_LDO15CTRL1     = 0x6E,
0277     /* Reserved: 0x6F */
0278     MAX77802_REG_LDO17CTRL1     = 0x70,
0279     MAX77802_REG_LDO18CTRL1     = 0x71,
0280     MAX77802_REG_LDO19CTRL1     = 0x72,
0281     MAX77802_REG_LDO20CTRL1     = 0x73,
0282     MAX77802_REG_LDO21CTRL1     = 0x74,
0283     MAX77802_REG_LDO22CTRL1     = 0x75,
0284     MAX77802_REG_LDO23CTRL1     = 0x76,
0285     MAX77802_REG_LDO24CTRL1     = 0x77,
0286     MAX77802_REG_LDO25CTRL1     = 0x78,
0287     MAX77802_REG_LDO26CTRL1     = 0x79,
0288     MAX77802_REG_LDO27CTRL1     = 0x7A,
0289     MAX77802_REG_LDO28CTRL1     = 0x7B,
0290     MAX77802_REG_LDO29CTRL1     = 0x7C,
0291     MAX77802_REG_LDO30CTRL1     = 0x7D,
0292     /* Reserved: 0x7E */
0293     MAX77802_REG_LDO32CTRL1     = 0x7F,
0294     MAX77802_REG_LDO33CTRL1     = 0x80,
0295     MAX77802_REG_LDO34CTRL1     = 0x81,
0296     MAX77802_REG_LDO35CTRL1     = 0x82,
0297     /* Reserved: 0x83-0x8F */
0298     MAX77802_REG_LDO1CTRL2      = 0x90,
0299     MAX77802_REG_LDO2CTRL2      = 0x91,
0300     MAX77802_REG_LDO3CTRL2      = 0x92,
0301     MAX77802_REG_LDO4CTRL2      = 0x93,
0302     MAX77802_REG_LDO5CTRL2      = 0x94,
0303     MAX77802_REG_LDO6CTRL2      = 0x95,
0304     MAX77802_REG_LDO7CTRL2      = 0x96,
0305     MAX77802_REG_LDO8CTRL2      = 0x97,
0306     MAX77802_REG_LDO9CTRL2      = 0x98,
0307     MAX77802_REG_LDO10CTRL2     = 0x99,
0308     MAX77802_REG_LDO11CTRL2     = 0x9A,
0309     MAX77802_REG_LDO12CTRL2     = 0x9B,
0310     MAX77802_REG_LDO13CTRL2     = 0x9C,
0311     MAX77802_REG_LDO14CTRL2     = 0x9D,
0312     MAX77802_REG_LDO15CTRL2     = 0x9E,
0313     /* Reserved: 0x9F */
0314     MAX77802_REG_LDO17CTRL2     = 0xA0,
0315     MAX77802_REG_LDO18CTRL2     = 0xA1,
0316     MAX77802_REG_LDO19CTRL2     = 0xA2,
0317     MAX77802_REG_LDO20CTRL2     = 0xA3,
0318     MAX77802_REG_LDO21CTRL2     = 0xA4,
0319     MAX77802_REG_LDO22CTRL2     = 0xA5,
0320     MAX77802_REG_LDO23CTRL2     = 0xA6,
0321     MAX77802_REG_LDO24CTRL2     = 0xA7,
0322     MAX77802_REG_LDO25CTRL2     = 0xA8,
0323     MAX77802_REG_LDO26CTRL2     = 0xA9,
0324     MAX77802_REG_LDO27CTRL2     = 0xAA,
0325     MAX77802_REG_LDO28CTRL2     = 0xAB,
0326     MAX77802_REG_LDO29CTRL2     = 0xAC,
0327     MAX77802_REG_LDO30CTRL2     = 0xAD,
0328     /* Reserved: 0xAE */
0329     MAX77802_REG_LDO32CTRL2     = 0xAF,
0330     MAX77802_REG_LDO33CTRL2     = 0xB0,
0331     MAX77802_REG_LDO34CTRL2     = 0xB1,
0332     MAX77802_REG_LDO35CTRL2     = 0xB2,
0333     /* Reserved: 0xB3 */
0334 
0335     MAX77802_REG_BBAT_CHG       = 0xB4,
0336     MAX77802_REG_32KHZ      = 0xB5,
0337 
0338     MAX77802_REG_PMIC_END       = 0xB6,
0339 };
0340 
0341 enum max77802_rtc_reg {
0342     MAX77802_RTC_INT        = 0xC0,
0343     MAX77802_RTC_INTM       = 0xC1,
0344     MAX77802_RTC_CONTROLM       = 0xC2,
0345     MAX77802_RTC_CONTROL        = 0xC3,
0346     MAX77802_RTC_UPDATE0        = 0xC4,
0347     MAX77802_RTC_UPDATE1        = 0xC5,
0348     MAX77802_WTSR_SMPL_CNTL     = 0xC6,
0349     MAX77802_RTC_SEC        = 0xC7,
0350     MAX77802_RTC_MIN        = 0xC8,
0351     MAX77802_RTC_HOUR       = 0xC9,
0352     MAX77802_RTC_WEEKDAY        = 0xCA,
0353     MAX77802_RTC_MONTH      = 0xCB,
0354     MAX77802_RTC_YEAR       = 0xCC,
0355     MAX77802_RTC_MONTHDAY       = 0xCD,
0356     MAX77802_RTC_AE1        = 0xCE,
0357     MAX77802_ALARM1_SEC     = 0xCF,
0358     MAX77802_ALARM1_MIN     = 0xD0,
0359     MAX77802_ALARM1_HOUR        = 0xD1,
0360     MAX77802_ALARM1_WEEKDAY     = 0xD2,
0361     MAX77802_ALARM1_MONTH       = 0xD3,
0362     MAX77802_ALARM1_YEAR        = 0xD4,
0363     MAX77802_ALARM1_DATE        = 0xD5,
0364     MAX77802_RTC_AE2        = 0xD6,
0365     MAX77802_ALARM2_SEC     = 0xD7,
0366     MAX77802_ALARM2_MIN     = 0xD8,
0367     MAX77802_ALARM2_HOUR        = 0xD9,
0368     MAX77802_ALARM2_WEEKDAY     = 0xDA,
0369     MAX77802_ALARM2_MONTH       = 0xDB,
0370     MAX77802_ALARM2_YEAR        = 0xDC,
0371     MAX77802_ALARM2_DATE        = 0xDD,
0372 
0373     MAX77802_RTC_END        = 0xDF,
0374 };
0375 
0376 enum max77686_irq_source {
0377     PMIC_INT1 = 0,
0378     PMIC_INT2,
0379     RTC_INT,
0380 
0381     MAX77686_IRQ_GROUP_NR,
0382 };
0383 
0384 enum max77686_irq {
0385     MAX77686_PMICIRQ_PWRONF,
0386     MAX77686_PMICIRQ_PWRONR,
0387     MAX77686_PMICIRQ_JIGONBF,
0388     MAX77686_PMICIRQ_JIGONBR,
0389     MAX77686_PMICIRQ_ACOKBF,
0390     MAX77686_PMICIRQ_ACOKBR,
0391     MAX77686_PMICIRQ_ONKEY1S,
0392     MAX77686_PMICIRQ_MRSTB,
0393 
0394     MAX77686_PMICIRQ_140C,
0395     MAX77686_PMICIRQ_120C,
0396 
0397     MAX77686_RTCIRQ_RTC60S = 0,
0398     MAX77686_RTCIRQ_RTCA1,
0399     MAX77686_RTCIRQ_RTCA2,
0400     MAX77686_RTCIRQ_SMPL,
0401     MAX77686_RTCIRQ_RTC1S,
0402     MAX77686_RTCIRQ_WTSR,
0403 };
0404 
0405 #define MAX77686_INT1_PWRONF_MSK    BIT(0)
0406 #define MAX77686_INT1_PWRONR_MSK    BIT(1)
0407 #define MAX77686_INT1_JIGONBF_MSK   BIT(2)
0408 #define MAX77686_INT1_JIGONBR_MSK   BIT(3)
0409 #define MAX77686_INT1_ACOKBF_MSK    BIT(4)
0410 #define MAX77686_INT1_ACOKBR_MSK    BIT(5)
0411 #define MAX77686_INT1_ONKEY1S_MSK   BIT(6)
0412 #define MAX77686_INT1_MRSTB_MSK     BIT(7)
0413 
0414 #define MAX77686_INT2_140C_MSK      BIT(0)
0415 #define MAX77686_INT2_120C_MSK      BIT(1)
0416 
0417 #define MAX77686_RTCINT_RTC60S_MSK  BIT(0)
0418 #define MAX77686_RTCINT_RTCA1_MSK   BIT(1)
0419 #define MAX77686_RTCINT_RTCA2_MSK   BIT(2)
0420 #define MAX77686_RTCINT_SMPL_MSK    BIT(3)
0421 #define MAX77686_RTCINT_RTC1S_MSK   BIT(4)
0422 #define MAX77686_RTCINT_WTSR_MSK    BIT(5)
0423 
0424 struct max77686_dev {
0425     struct device *dev;
0426     struct i2c_client *i2c; /* 0xcc / PMIC, Battery Control, and FLASH */
0427 
0428     unsigned long type;
0429 
0430     struct regmap *regmap;      /* regmap for mfd */
0431     struct regmap_irq_chip_data *irq_data;
0432 
0433     int irq;
0434     struct mutex irqlock;
0435     int irq_masks_cur[MAX77686_IRQ_GROUP_NR];
0436     int irq_masks_cache[MAX77686_IRQ_GROUP_NR];
0437 };
0438 
0439 enum max77686_types {
0440     TYPE_MAX77686,
0441     TYPE_MAX77802,
0442 };
0443 
0444 extern int max77686_irq_init(struct max77686_dev *max77686);
0445 extern void max77686_irq_exit(struct max77686_dev *max77686);
0446 extern int max77686_irq_resume(struct max77686_dev *max77686);
0447 
0448 #endif /*  __LINUX_MFD_MAX77686_PRIV_H */
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