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0009 #ifndef MAX77650_H
0010 #define MAX77650_H
0011
0012 #include <linux/bits.h>
0013
0014 #define MAX77650_REG_INT_GLBL 0x00
0015 #define MAX77650_REG_INT_CHG 0x01
0016 #define MAX77650_REG_STAT_CHG_A 0x02
0017 #define MAX77650_REG_STAT_CHG_B 0x03
0018 #define MAX77650_REG_ERCFLAG 0x04
0019 #define MAX77650_REG_STAT_GLBL 0x05
0020 #define MAX77650_REG_INTM_GLBL 0x06
0021 #define MAX77650_REG_INTM_CHG 0x07
0022 #define MAX77650_REG_CNFG_GLBL 0x10
0023 #define MAX77650_REG_CID 0x11
0024 #define MAX77650_REG_CNFG_GPIO 0x12
0025 #define MAX77650_REG_CNFG_CHG_A 0x18
0026 #define MAX77650_REG_CNFG_CHG_B 0x19
0027 #define MAX77650_REG_CNFG_CHG_C 0x1a
0028 #define MAX77650_REG_CNFG_CHG_D 0x1b
0029 #define MAX77650_REG_CNFG_CHG_E 0x1c
0030 #define MAX77650_REG_CNFG_CHG_F 0x1d
0031 #define MAX77650_REG_CNFG_CHG_G 0x1e
0032 #define MAX77650_REG_CNFG_CHG_H 0x1f
0033 #define MAX77650_REG_CNFG_CHG_I 0x20
0034 #define MAX77650_REG_CNFG_SBB_TOP 0x28
0035 #define MAX77650_REG_CNFG_SBB0_A 0x29
0036 #define MAX77650_REG_CNFG_SBB0_B 0x2a
0037 #define MAX77650_REG_CNFG_SBB1_A 0x2b
0038 #define MAX77650_REG_CNFG_SBB1_B 0x2c
0039 #define MAX77650_REG_CNFG_SBB2_A 0x2d
0040 #define MAX77650_REG_CNFG_SBB2_B 0x2e
0041 #define MAX77650_REG_CNFG_LDO_A 0x38
0042 #define MAX77650_REG_CNFG_LDO_B 0x39
0043 #define MAX77650_REG_CNFG_LED0_A 0x40
0044 #define MAX77650_REG_CNFG_LED1_A 0x41
0045 #define MAX77650_REG_CNFG_LED2_A 0x42
0046 #define MAX77650_REG_CNFG_LED0_B 0x43
0047 #define MAX77650_REG_CNFG_LED1_B 0x44
0048 #define MAX77650_REG_CNFG_LED2_B 0x45
0049 #define MAX77650_REG_CNFG_LED_TOP 0x46
0050
0051 #define MAX77650_CID_MASK GENMASK(3, 0)
0052 #define MAX77650_CID_BITS(_reg) (_reg & MAX77650_CID_MASK)
0053
0054 #define MAX77650_CID_77650A 0x03
0055 #define MAX77650_CID_77650C 0x0a
0056 #define MAX77650_CID_77651A 0x06
0057 #define MAX77650_CID_77651B 0x08
0058
0059 #endif