0001
0002
0003
0004
0005
0006
0007
0008 #ifndef __LINUX_MFD_LP873X_H
0009 #define __LINUX_MFD_LP873X_H
0010
0011 #include <linux/i2c.h>
0012 #include <linux/regulator/driver.h>
0013 #include <linux/regulator/machine.h>
0014
0015
0016 #define LP873X 0x00
0017
0018
0019 #define LP873X_REG_DEV_REV 0X00
0020 #define LP873X_REG_OTP_REV 0X01
0021 #define LP873X_REG_BUCK0_CTRL_1 0X02
0022 #define LP873X_REG_BUCK0_CTRL_2 0X03
0023 #define LP873X_REG_BUCK1_CTRL_1 0X04
0024 #define LP873X_REG_BUCK1_CTRL_2 0X05
0025 #define LP873X_REG_BUCK0_VOUT 0X06
0026 #define LP873X_REG_BUCK1_VOUT 0X07
0027 #define LP873X_REG_LDO0_CTRL 0X08
0028 #define LP873X_REG_LDO1_CTRL 0X09
0029 #define LP873X_REG_LDO0_VOUT 0X0A
0030 #define LP873X_REG_LDO1_VOUT 0X0B
0031 #define LP873X_REG_BUCK0_DELAY 0X0C
0032 #define LP873X_REG_BUCK1_DELAY 0X0D
0033 #define LP873X_REG_LDO0_DELAY 0X0E
0034 #define LP873X_REG_LDO1_DELAY 0X0F
0035 #define LP873X_REG_GPO_DELAY 0X10
0036 #define LP873X_REG_GPO2_DELAY 0X11
0037 #define LP873X_REG_GPO_CTRL 0X12
0038 #define LP873X_REG_CONFIG 0X13
0039 #define LP873X_REG_PLL_CTRL 0X14
0040 #define LP873X_REG_PGOOD_CTRL1 0X15
0041 #define LP873X_REG_PGOOD_CTRL2 0X16
0042 #define LP873X_REG_PG_FAULT 0X17
0043 #define LP873X_REG_RESET 0X18
0044 #define LP873X_REG_INT_TOP_1 0X19
0045 #define LP873X_REG_INT_TOP_2 0X1A
0046 #define LP873X_REG_INT_BUCK 0X1B
0047 #define LP873X_REG_INT_LDO 0X1C
0048 #define LP873X_REG_TOP_STAT 0X1D
0049 #define LP873X_REG_BUCK_STAT 0X1E
0050 #define LP873X_REG_LDO_STAT 0x1F
0051 #define LP873X_REG_TOP_MASK_1 0x20
0052 #define LP873X_REG_TOP_MASK_2 0x21
0053 #define LP873X_REG_BUCK_MASK 0x22
0054 #define LP873X_REG_LDO_MASK 0x23
0055 #define LP873X_REG_SEL_I_LOAD 0x24
0056 #define LP873X_REG_I_LOAD_2 0x25
0057 #define LP873X_REG_I_LOAD_1 0x26
0058
0059 #define LP873X_REG_MAX LP873X_REG_I_LOAD_1
0060
0061
0062 #define LP873X_DEV_REV_DEV_ID 0xC0
0063 #define LP873X_DEV_REV_ALL_LAYER 0x30
0064 #define LP873X_DEV_REV_METAL_LAYER 0x0F
0065
0066 #define LP873X_OTP_REV_OTP_ID 0xFF
0067
0068 #define LP873X_BUCK0_CTRL_1_BUCK0_FPWM BIT(3)
0069 #define LP873X_BUCK0_CTRL_1_BUCK0_RDIS_EN BIT(2)
0070 #define LP873X_BUCK0_CTRL_1_BUCK0_EN_PIN_CTRL BIT(1)
0071 #define LP873X_BUCK0_CTRL_1_BUCK0_EN BIT(0)
0072
0073 #define LP873X_BUCK0_CTRL_2_BUCK0_ILIM 0x38
0074 #define LP873X_BUCK0_CTRL_2_BUCK0_SLEW_RATE 0x07
0075
0076 #define LP873X_BUCK1_CTRL_1_BUCK1_FPWM BIT(3)
0077 #define LP873X_BUCK1_CTRL_1_BUCK1_RDIS_EN BIT(2)
0078 #define LP873X_BUCK1_CTRL_1_BUCK1_EN_PIN_CTRL BIT(1)
0079 #define LP873X_BUCK1_CTRL_1_BUCK1_EN BIT(0)
0080
0081 #define LP873X_BUCK1_CTRL_2_BUCK1_ILIM 0x38
0082 #define LP873X_BUCK1_CTRL_2_BUCK1_SLEW_RATE 0x07
0083
0084 #define LP873X_BUCK0_VOUT_BUCK0_VSET 0xFF
0085
0086 #define LP873X_BUCK1_VOUT_BUCK1_VSET 0xFF
0087
0088 #define LP873X_LDO0_CTRL_LDO0_RDIS_EN BIT(2)
0089 #define LP873X_LDO0_CTRL_LDO0_EN_PIN_CTRL BIT(1)
0090 #define LP873X_LDO0_CTRL_LDO0_EN BIT(0)
0091
0092 #define LP873X_LDO1_CTRL_LDO1_RDIS_EN BIT(2)
0093 #define LP873X_LDO1_CTRL_LDO1_EN_PIN_CTRL BIT(1)
0094 #define LP873X_LDO1_CTRL_LDO1_EN BIT(0)
0095
0096 #define LP873X_LDO0_VOUT_LDO0_VSET 0x1F
0097
0098 #define LP873X_LDO1_VOUT_LDO1_VSET 0x1F
0099
0100 #define LP873X_BUCK0_DELAY_BUCK0_SD_DELAY 0xF0
0101 #define LP873X_BUCK0_DELAY_BUCK0_SU_DELAY 0x0F
0102
0103 #define LP873X_BUCK1_DELAY_BUCK1_SD_DELAY 0xF0
0104 #define LP873X_BUCK1_DELAY_BUCK1_SU_DELAY 0x0F
0105
0106 #define LP873X_LDO0_DELAY_LDO0_SD_DELAY 0xF0
0107 #define LP873X_LDO0_DELAY_LDO0_SU_DELAY 0x0F
0108
0109 #define LP873X_LDO1_DELAY_LDO1_SD_DELAY 0xF0
0110 #define LP873X_LDO1_DELAY_LDO1_SU_DELAY 0x0F
0111
0112 #define LP873X_GPO_DELAY_GPO_SD_DELAY 0xF0
0113 #define LP873X_GPO_DELAY_GPO_SU_DELAY 0x0F
0114
0115 #define LP873X_GPO2_DELAY_GPO2_SD_DELAY 0xF0
0116 #define LP873X_GPO2_DELAY_GPO2_SU_DELAY 0x0F
0117
0118 #define LP873X_GPO_CTRL_GPO2_OD BIT(6)
0119 #define LP873X_GPO_CTRL_GPO2_EN_PIN_CTRL BIT(5)
0120 #define LP873X_GPO_CTRL_GPO2_EN BIT(4)
0121 #define LP873X_GPO_CTRL_GPO_OD BIT(2)
0122 #define LP873X_GPO_CTRL_GPO_EN_PIN_CTRL BIT(1)
0123 #define LP873X_GPO_CTRL_GPO_EN BIT(0)
0124
0125 #define LP873X_CONFIG_SU_DELAY_SEL BIT(6)
0126 #define LP873X_CONFIG_SD_DELAY_SEL BIT(5)
0127 #define LP873X_CONFIG_CLKIN_PIN_SEL BIT(4)
0128 #define LP873X_CONFIG_CLKIN_PD BIT(3)
0129 #define LP873X_CONFIG_EN_PD BIT(2)
0130 #define LP873X_CONFIG_TDIE_WARN_LEVEL BIT(1)
0131 #define LP873X_EN_SPREAD_SPEC BIT(0)
0132
0133 #define LP873X_PLL_CTRL_EN_PLL BIT(6)
0134 #define LP873X_EXT_CLK_FREQ 0x1F
0135
0136 #define LP873X_PGOOD_CTRL1_PGOOD_POL BIT(7)
0137 #define LP873X_PGOOD_CTRL1_PGOOD_OD BIT(6)
0138 #define LP873X_PGOOD_CTRL1_PGOOD_WINDOW_LDO BIT(5)
0139 #define LP873X_PGOOD_CTRL1_PGOOD_WINDOWN_BUCK BIT(4)
0140 #define LP873X_PGOOD_CTRL1_PGOOD_EN_PGOOD_LDO1 BIT(3)
0141 #define LP873X_PGOOD_CTRL1_PGOOD_EN_PGOOD_LDO0 BIT(2)
0142 #define LP873X_PGOOD_CTRL1_PGOOD_EN_PGOOD_BUCK1 BIT(1)
0143 #define LP873X_PGOOD_CTRL1_PGOOD_EN_PGOOD_BUCK0 BIT(0)
0144
0145 #define LP873X_PGOOD_CTRL2_EN_PGOOD_TWARN BIT(2)
0146 #define LP873X_PGOOD_CTRL2_EN_PG_FAULT_GATE BIT(1)
0147 #define LP873X_PGOOD_CTRL2_PGOOD_MODE BIT(0)
0148
0149 #define LP873X_PG_FAULT_PG_FAULT_LDO1 BIT(3)
0150 #define LP873X_PG_FAULT_PG_FAULT_LDO0 BIT(2)
0151 #define LP873X_PG_FAULT_PG_FAULT_BUCK1 BIT(1)
0152 #define LP873X_PG_FAULT_PG_FAULT_BUCK0 BIT(0)
0153
0154 #define LP873X_RESET_SW_RESET BIT(0)
0155
0156 #define LP873X_INT_TOP_1_PGOOD_INT BIT(7)
0157 #define LP873X_INT_TOP_1_LDO_INT BIT(6)
0158 #define LP873X_INT_TOP_1_BUCK_INT BIT(5)
0159 #define LP873X_INT_TOP_1_SYNC_CLK_INT BIT(4)
0160 #define LP873X_INT_TOP_1_TDIE_SD_INT BIT(3)
0161 #define LP873X_INT_TOP_1_TDIE_WARN_INT BIT(2)
0162 #define LP873X_INT_TOP_1_OVP_INT BIT(1)
0163 #define LP873X_INT_TOP_1_I_MEAS_INT BIT(0)
0164
0165 #define LP873X_INT_TOP_2_RESET_REG_INT BIT(0)
0166
0167 #define LP873X_INT_BUCK_BUCK1_PG_INT BIT(6)
0168 #define LP873X_INT_BUCK_BUCK1_SC_INT BIT(5)
0169 #define LP873X_INT_BUCK_BUCK1_ILIM_INT BIT(4)
0170 #define LP873X_INT_BUCK_BUCK0_PG_INT BIT(2)
0171 #define LP873X_INT_BUCK_BUCK0_SC_INT BIT(1)
0172 #define LP873X_INT_BUCK_BUCK0_ILIM_INT BIT(0)
0173
0174 #define LP873X_INT_LDO_LDO1_PG_INT BIT(6)
0175 #define LP873X_INT_LDO_LDO1_SC_INT BIT(5)
0176 #define LP873X_INT_LDO_LDO1_ILIM_INT BIT(4)
0177 #define LP873X_INT_LDO_LDO0_PG_INT BIT(2)
0178 #define LP873X_INT_LDO_LDO0_SC_INT BIT(1)
0179 #define LP873X_INT_LDO_LDO0_ILIM_INT BIT(0)
0180
0181 #define LP873X_TOP_STAT_PGOOD_STAT BIT(7)
0182 #define LP873X_TOP_STAT_SYNC_CLK_STAT BIT(4)
0183 #define LP873X_TOP_STAT_TDIE_SD_STAT BIT(3)
0184 #define LP873X_TOP_STAT_TDIE_WARN_STAT BIT(2)
0185 #define LP873X_TOP_STAT_OVP_STAT BIT(1)
0186
0187 #define LP873X_BUCK_STAT_BUCK1_STAT BIT(7)
0188 #define LP873X_BUCK_STAT_BUCK1_PG_STAT BIT(6)
0189 #define LP873X_BUCK_STAT_BUCK1_ILIM_STAT BIT(4)
0190 #define LP873X_BUCK_STAT_BUCK0_STAT BIT(3)
0191 #define LP873X_BUCK_STAT_BUCK0_PG_STAT BIT(2)
0192 #define LP873X_BUCK_STAT_BUCK0_ILIM_STAT BIT(0)
0193
0194 #define LP873X_LDO_STAT_LDO1_STAT BIT(7)
0195 #define LP873X_LDO_STAT_LDO1_PG_STAT BIT(6)
0196 #define LP873X_LDO_STAT_LDO1_ILIM_STAT BIT(4)
0197 #define LP873X_LDO_STAT_LDO0_STAT BIT(3)
0198 #define LP873X_LDO_STAT_LDO0_PG_STAT BIT(2)
0199 #define LP873X_LDO_STAT_LDO0_ILIM_STAT BIT(0)
0200
0201 #define LP873X_TOP_MASK_1_PGOOD_INT_MASK BIT(7)
0202 #define LP873X_TOP_MASK_1_SYNC_CLK_MASK BIT(4)
0203 #define LP873X_TOP_MASK_1_TDIE_WARN_MASK BIT(2)
0204 #define LP873X_TOP_MASK_1_I_MEAS_MASK BIT(0)
0205
0206 #define LP873X_TOP_MASK_2_RESET_REG_MASK BIT(0)
0207
0208 #define LP873X_BUCK_MASK_BUCK1_PGF_MASK BIT(7)
0209 #define LP873X_BUCK_MASK_BUCK1_PGR_MASK BIT(6)
0210 #define LP873X_BUCK_MASK_BUCK1_ILIM_MASK BIT(4)
0211 #define LP873X_BUCK_MASK_BUCK0_PGF_MASK BIT(3)
0212 #define LP873X_BUCK_MASK_BUCK0_PGR_MASK BIT(2)
0213 #define LP873X_BUCK_MASK_BUCK0_ILIM_MASK BIT(0)
0214
0215 #define LP873X_LDO_MASK_LDO1_PGF_MASK BIT(7)
0216 #define LP873X_LDO_MASK_LDO1_PGR_MASK BIT(6)
0217 #define LP873X_LDO_MASK_LDO1_ILIM_MASK BIT(4)
0218 #define LP873X_LDO_MASK_LDO0_PGF_MASK BIT(3)
0219 #define LP873X_LDO_MASK_LDO0_PGR_MASK BIT(2)
0220 #define LP873X_LDO_MASK_LDO0_ILIM_MASK BIT(0)
0221
0222 #define LP873X_SEL_I_LOAD_CURRENT_BUCK_SELECT BIT(0)
0223
0224 #define LP873X_I_LOAD_2_BUCK_LOAD_CURRENT BIT(0)
0225
0226 #define LP873X_I_LOAD_1_BUCK_LOAD_CURRENT 0xFF
0227
0228 #define LP873X_MAX_REG_ID LP873X_LDO_1
0229
0230
0231 #define LP873X_NUM_BUCK 2
0232
0233 #define LP873X_NUM_LDO 2
0234
0235 #define LP873X_NUM_REGULATOR (LP873X_NUM_BUCK + LP873X_NUM_LDO)
0236
0237 enum lp873x_regulator_id {
0238
0239 LP873X_BUCK_0,
0240 LP873X_BUCK_1,
0241
0242 LP873X_LDO_0,
0243 LP873X_LDO_1,
0244 };
0245
0246
0247
0248
0249
0250
0251
0252
0253
0254
0255 struct lp873x {
0256 struct device *dev;
0257 u8 rev;
0258 struct regmap *regmap;
0259 };
0260 #endif