Back to home page

OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Header file for Intel Merrifield Basin Cove PMIC
0004  *
0005  * Copyright (C) 2019 Intel Corporation. All rights reserved.
0006  */
0007 
0008 #ifndef __INTEL_SOC_PMIC_MRFLD_H__
0009 #define __INTEL_SOC_PMIC_MRFLD_H__
0010 
0011 #include <linux/bits.h>
0012 
0013 #define BCOVE_ID        0x00
0014 
0015 #define BCOVE_ID_MINREV0    GENMASK(2, 0)
0016 #define BCOVE_ID_MAJREV0    GENMASK(5, 3)
0017 #define BCOVE_ID_VENDID0    GENMASK(7, 6)
0018 
0019 #define BCOVE_MINOR(x)      (unsigned int)(((x) & BCOVE_ID_MINREV0) >> 0)
0020 #define BCOVE_MAJOR(x)      (unsigned int)(((x) & BCOVE_ID_MAJREV0) >> 3)
0021 #define BCOVE_VENDOR(x)     (unsigned int)(((x) & BCOVE_ID_VENDID0) >> 6)
0022 
0023 #define BCOVE_IRQLVL1       0x01
0024 
0025 #define BCOVE_PBIRQ     0x02
0026 #define BCOVE_TMUIRQ        0x03
0027 #define BCOVE_THRMIRQ       0x04
0028 #define BCOVE_BCUIRQ        0x05
0029 #define BCOVE_ADCIRQ        0x06
0030 #define BCOVE_CHGRIRQ0      0x07
0031 #define BCOVE_CHGRIRQ1      0x08
0032 #define BCOVE_GPIOIRQ       0x09
0033 #define BCOVE_CRITIRQ       0x0B
0034 
0035 #define BCOVE_MIRQLVL1      0x0C
0036 
0037 #define BCOVE_MPBIRQ        0x0D
0038 #define BCOVE_MTMUIRQ       0x0E
0039 #define BCOVE_MTHRMIRQ      0x0F
0040 #define BCOVE_MBCUIRQ       0x10
0041 #define BCOVE_MADCIRQ       0x11
0042 #define BCOVE_MCHGRIRQ0     0x12
0043 #define BCOVE_MCHGRIRQ1     0x13
0044 #define BCOVE_MGPIOIRQ      0x14
0045 #define BCOVE_MCRITIRQ      0x16
0046 
0047 #define BCOVE_SCHGRIRQ0     0x4E
0048 #define BCOVE_SCHGRIRQ1     0x4F
0049 
0050 /* Level 1 IRQs */
0051 #define BCOVE_LVL1_PWRBTN   BIT(0)  /* power button */
0052 #define BCOVE_LVL1_TMU      BIT(1)  /* time management unit */
0053 #define BCOVE_LVL1_THRM     BIT(2)  /* thermal */
0054 #define BCOVE_LVL1_BCU      BIT(3)  /* burst control unit */
0055 #define BCOVE_LVL1_ADC      BIT(4)  /* ADC */
0056 #define BCOVE_LVL1_CHGR     BIT(5)  /* charger */
0057 #define BCOVE_LVL1_GPIO     BIT(6)  /* GPIO */
0058 #define BCOVE_LVL1_CRIT     BIT(7)  /* critical event */
0059 
0060 /* Level 2 IRQs: power button */
0061 #define BCOVE_PBIRQ_PBTN    BIT(0)
0062 #define BCOVE_PBIRQ_UBTN    BIT(1)
0063 
0064 /* Level 2 IRQs: ADC */
0065 #define BCOVE_ADCIRQ_BATTEMP    BIT(2)
0066 #define BCOVE_ADCIRQ_SYSTEMP    BIT(3)
0067 #define BCOVE_ADCIRQ_BATTID BIT(4)
0068 #define BCOVE_ADCIRQ_VIBATT BIT(5)
0069 #define BCOVE_ADCIRQ_CCTICK BIT(7)
0070 
0071 /* Level 2 IRQs: charger */
0072 #define BCOVE_CHGRIRQ_BAT0ALRT  BIT(4)
0073 #define BCOVE_CHGRIRQ_BAT1ALRT  BIT(5)
0074 #define BCOVE_CHGRIRQ_BATCRIT   BIT(6)
0075 
0076 #define BCOVE_CHGRIRQ_VBUSDET   BIT(0)
0077 #define BCOVE_CHGRIRQ_DCDET BIT(1)
0078 #define BCOVE_CHGRIRQ_BATTDET   BIT(2)
0079 #define BCOVE_CHGRIRQ_USBIDDET  BIT(3)
0080 
0081 #endif  /* __INTEL_SOC_PMIC_MRFLD_H__ */