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0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Device driver for regulators in hi655x IC
0004  *
0005  * Copyright (c) 2016 HiSilicon Ltd.
0006  *
0007  * Authors:
0008  * Chen Feng <puck.chen@hisilicon.com>
0009  * Fei  Wang <w.f@huawei.com>
0010  */
0011 
0012 #ifndef __HI655X_PMIC_H
0013 #define __HI655X_PMIC_H
0014 
0015 #include <linux/gpio/consumer.h>
0016 
0017 /* Hi655x registers are mapped to memory bus in 4 bytes stride */
0018 #define HI655X_STRIDE                   4
0019 #define HI655X_BUS_ADDR(x)              ((x) << 2)
0020 
0021 #define HI655X_BITS                     8
0022 
0023 #define HI655X_NR_IRQ                   32
0024 
0025 #define HI655X_IRQ_STAT_BASE            (0x003 << 2)
0026 #define HI655X_IRQ_MASK_BASE            (0x007 << 2)
0027 #define HI655X_ANA_IRQM_BASE            (0x1b5 << 2)
0028 #define HI655X_IRQ_ARRAY                4
0029 #define HI655X_IRQ_MASK                 0xFF
0030 #define HI655X_IRQ_CLR                  0xFF
0031 #define HI655X_VER_REG                  0x00
0032 
0033 #define PMU_VER_START                   0x10
0034 #define PMU_VER_END                     0x38
0035 
0036 #define RESERVE_INT                     7
0037 #define PWRON_D20R_INT                  6
0038 #define PWRON_D20F_INT                  5
0039 #define PWRON_D4SR_INT                  4
0040 #define VSYS_6P0_D200UR_INT             3
0041 #define VSYS_UV_D3R_INT                 2
0042 #define VSYS_2P5_R_INT                  1
0043 #define OTMP_D1R_INT                    0
0044 
0045 #define RESERVE_INT_MASK                BIT(RESERVE_INT)
0046 #define PWRON_D20R_INT_MASK             BIT(PWRON_D20R_INT)
0047 #define PWRON_D20F_INT_MASK             BIT(PWRON_D20F_INT)
0048 #define PWRON_D4SR_INT_MASK             BIT(PWRON_D4SR_INT)
0049 #define VSYS_6P0_D200UR_INT_MASK        BIT(VSYS_6P0_D200UR_INT)
0050 #define VSYS_UV_D3R_INT_MASK            BIT(VSYS_UV_D3R_INT)
0051 #define VSYS_2P5_R_INT_MASK             BIT(VSYS_2P5_R_INT)
0052 #define OTMP_D1R_INT_MASK               BIT(OTMP_D1R_INT)
0053 
0054 struct hi655x_pmic {
0055     struct resource *res;
0056     struct device *dev;
0057     struct regmap *regmap;
0058     struct gpio_desc *gpio;
0059     unsigned int ver;
0060     struct regmap_irq_chip_data *irq_data;
0061 };
0062 
0063 #endif