linux/mfd/dm355evm_msp.h

0001 /*
0002  * dm355evm_msp.h - support MSP430 microcontroller on DM355EVM board
0003  */
0004 #ifndef __LINUX_I2C_DM355EVM_MSP
0005 #define __LINUX_I2C_DM355EVM_MSP
0006
0007 /*
0008  * Written against Spectrum's writeup for the A4 firmware revision,
0009  * and tweaked to match source and rev D2 schematics by removing CPLD
0010  * and NOR flash hooks (which were last appropriate in rev B boards).
0011  *
0012  * Note that the firmware supports a flavor of write posting ... to be
0013  * sure a write completes, issue another read or write.
0014  */
0015
0016 /* utilities to access "registers" emulated by msp430 firmware */
0017 extern int dm355evm_msp_write(u8 value, u8 reg);
0018 extern int dm355evm_msp_read(u8 reg);
0019
0020
0021 /* command/control registers */
0022 #define DM355EVM_MSP_COMMAND        0x00
0023 #   define MSP_COMMAND_NULL     0
0024 #   define MSP_COMMAND_RESET_COLD   1
0025 #   define MSP_COMMAND_RESET_WARM   2
0026 #   define MSP_COMMAND_RESET_WARM_I 3
0027 #   define MSP_COMMAND_POWEROFF 4
0028 #   define MSP_COMMAND_IR_REINIT    5
0029 #define DM355EVM_MSP_STATUS     0x01
0030 #   define MSP_STATUS_BAD_OFFSET    BIT(0)
0031 #   define MSP_STATUS_BAD_COMMAND   BIT(1)
0032 #   define MSP_STATUS_POWER_ERROR   BIT(2)
0033 #   define MSP_STATUS_RXBUF_OVERRUN BIT(3)
0034 #define DM355EVM_MSP_RESET      0x02    /* 0 bits == in reset */
0035 #   define MSP_RESET_DC5        BIT(0)
0036 #   define MSP_RESET_TVP5154    BIT(2)
0037 #   define MSP_RESET_IMAGER     BIT(3)
0038 #   define MSP_RESET_ETHERNET   BIT(4)
0039 #   define MSP_RESET_SYS        BIT(5)
0040 #   define MSP_RESET_AIC33      BIT(7)
0041
0042 /* GPIO registers ... bit patterns mostly match the source MSP ports */
0043 #define DM355EVM_MSP_LED        0x03    /* active low (MSP P4) */
0044 #define DM355EVM_MSP_SWITCH1        0x04    /* (MSP P5, masked) */
0045 #   define MSP_SWITCH1_SW6_1    BIT(0)
0046 #   define MSP_SWITCH1_SW6_2    BIT(1)
0047 #   define MSP_SWITCH1_SW6_3    BIT(2)
0048 #   define MSP_SWITCH1_SW6_4    BIT(3)
0049 #   define MSP_SWITCH1_J1       BIT(4)  /* NTSC/PAL */
0050 #   define MSP_SWITCH1_MSP_INT  BIT(5)  /* active low */
0051 #define DM355EVM_MSP_SWITCH2        0x05    /* (MSP P6, masked) */
0052 #   define MSP_SWITCH2_SW10     BIT(3)
0053 #   define MSP_SWITCH2_SW11     BIT(4)
0054 #   define MSP_SWITCH2_SW12     BIT(5)
0055 #   define MSP_SWITCH2_SW13     BIT(6)
0056 #   define MSP_SWITCH2_SW14     BIT(7)
0057 #define DM355EVM_MSP_SDMMC      0x06    /* (MSP P2, masked) */
0058 #   define MSP_SDMMC_0_WP       BIT(1)
0059 #   define MSP_SDMMC_0_CD       BIT(2)  /* active low */
0060 #   define MSP_SDMMC_1_WP       BIT(3)
0061 #   define MSP_SDMMC_1_CD       BIT(4)  /* active low */
0062 #define DM355EVM_MSP_FIRMREV        0x07    /* not a GPIO (out of order) */
0063 #define DM355EVM_MSP_VIDEO_IN       0x08    /* (MSP P3, masked) */
0064 #   define MSP_VIDEO_IMAGER     BIT(7)  /* low == tvp5146 */
0065
0066 /* power supply registers are currently omitted */
0067
0068 /* RTC registers */
0069 #define DM355EVM_MSP_RTC_0      0x12    /* LSB */
0070 #define DM355EVM_MSP_RTC_1      0x13
0071 #define DM355EVM_MSP_RTC_2      0x14
0072 #define DM355EVM_MSP_RTC_3      0x15    /* MSB */
0073
0074 /* input event queue registers; code == ((HIGH << 8) | LOW) */
0075 #define DM355EVM_MSP_INPUT_COUNT    0x16    /* decrement by reading LOW */
0076 #define DM355EVM_MSP_INPUT_HIGH     0x17
0077 #define DM355EVM_MSP_INPUT_LOW      0x18
0078
0079 #endif /* __LINUX_I2C_DM355EVM_MSP */