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0010 #ifndef __DA9150_CORE_H
0011 #define __DA9150_CORE_H
0012
0013 #include <linux/device.h>
0014 #include <linux/i2c.h>
0015 #include <linux/interrupt.h>
0016 #include <linux/regmap.h>
0017
0018
0019 #define DA9150_REG_PAGE_SHIFT 8
0020 #define DA9150_REG_PAGE_MASK 0xFF
0021
0022
0023 #define DA9150_NUM_IRQ_REGS 4
0024 #define DA9150_IRQ_VBUS 0
0025 #define DA9150_IRQ_CHG 1
0026 #define DA9150_IRQ_TCLASS 2
0027 #define DA9150_IRQ_TJUNC 3
0028 #define DA9150_IRQ_VFAULT 4
0029 #define DA9150_IRQ_CONF 5
0030 #define DA9150_IRQ_DAT 6
0031 #define DA9150_IRQ_DTYPE 7
0032 #define DA9150_IRQ_ID 8
0033 #define DA9150_IRQ_ADP 9
0034 #define DA9150_IRQ_SESS_END 10
0035 #define DA9150_IRQ_SESS_VLD 11
0036 #define DA9150_IRQ_FG 12
0037 #define DA9150_IRQ_GP 13
0038 #define DA9150_IRQ_TBAT 14
0039 #define DA9150_IRQ_GPIOA 15
0040 #define DA9150_IRQ_GPIOB 16
0041 #define DA9150_IRQ_GPIOC 17
0042 #define DA9150_IRQ_GPIOD 18
0043 #define DA9150_IRQ_GPADC 19
0044 #define DA9150_IRQ_WKUP 20
0045
0046
0047 #define DA9150_QIF_I2C_ADDR_LSB 0x5
0048
0049 struct da9150_fg_pdata {
0050 u32 update_interval;
0051 u8 warn_soc_lvl;
0052 u8 crit_soc_lvl;
0053 };
0054
0055 struct da9150_pdata {
0056 int irq_base;
0057 struct da9150_fg_pdata *fg_pdata;
0058 };
0059
0060 struct da9150 {
0061 struct device *dev;
0062 struct regmap *regmap;
0063 struct i2c_client *core_qif;
0064
0065 struct regmap_irq_chip_data *regmap_irq_data;
0066 int irq;
0067 int irq_base;
0068 };
0069
0070
0071 void da9150_read_qif(struct da9150 *da9150, u8 addr, int count, u8 *buf);
0072 void da9150_write_qif(struct da9150 *da9150, u8 addr, int count, const u8 *buf);
0073
0074 u8 da9150_reg_read(struct da9150 *da9150, u16 reg);
0075 void da9150_reg_write(struct da9150 *da9150, u16 reg, u8 val);
0076 void da9150_set_bits(struct da9150 *da9150, u16 reg, u8 mask, u8 val);
0077
0078 void da9150_bulk_read(struct da9150 *da9150, u16 reg, int count, u8 *buf);
0079 void da9150_bulk_write(struct da9150 *da9150, u16 reg, int count, const u8 *buf);
0080
0081 #endif