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0010 #ifndef __MFD_DA9052_DA9052_H
0011 #define __MFD_DA9052_DA9052_H
0012
0013 #include <linux/interrupt.h>
0014 #include <linux/regmap.h>
0015 #include <linux/slab.h>
0016 #include <linux/completion.h>
0017 #include <linux/list.h>
0018 #include <linux/mfd/core.h>
0019
0020 #include <linux/mfd/da9052/reg.h>
0021
0022
0023 #define DA9052_ADC_VDDOUT 0
0024 #define DA9052_ADC_ICH 1
0025 #define DA9052_ADC_TBAT 2
0026 #define DA9052_ADC_VBAT 3
0027 #define DA9052_ADC_IN4 4
0028 #define DA9052_ADC_IN5 5
0029 #define DA9052_ADC_IN6 6
0030 #define DA9052_ADC_TSI 7
0031 #define DA9052_ADC_TJUNC 8
0032 #define DA9052_ADC_VBBAT 9
0033
0034
0035 #define DA9052_ADC_TSI_XP 70
0036 #define DA9052_ADC_TSI_XN 71
0037 #define DA9052_ADC_TSI_YP 72
0038 #define DA9052_ADC_TSI_YN 73
0039
0040 #define DA9052_IRQ_DCIN 0
0041 #define DA9052_IRQ_VBUS 1
0042 #define DA9052_IRQ_DCINREM 2
0043 #define DA9052_IRQ_VBUSREM 3
0044 #define DA9052_IRQ_VDDLOW 4
0045 #define DA9052_IRQ_ALARM 5
0046 #define DA9052_IRQ_SEQRDY 6
0047 #define DA9052_IRQ_COMP1V2 7
0048 #define DA9052_IRQ_NONKEY 8
0049 #define DA9052_IRQ_IDFLOAT 9
0050 #define DA9052_IRQ_IDGND 10
0051 #define DA9052_IRQ_CHGEND 11
0052 #define DA9052_IRQ_TBAT 12
0053 #define DA9052_IRQ_ADC_EOM 13
0054 #define DA9052_IRQ_PENDOWN 14
0055 #define DA9052_IRQ_TSIREADY 15
0056 #define DA9052_IRQ_GPI0 16
0057 #define DA9052_IRQ_GPI1 17
0058 #define DA9052_IRQ_GPI2 18
0059 #define DA9052_IRQ_GPI3 19
0060 #define DA9052_IRQ_GPI4 20
0061 #define DA9052_IRQ_GPI5 21
0062 #define DA9052_IRQ_GPI6 22
0063 #define DA9052_IRQ_GPI7 23
0064 #define DA9052_IRQ_GPI8 24
0065 #define DA9052_IRQ_GPI9 25
0066 #define DA9052_IRQ_GPI10 26
0067 #define DA9052_IRQ_GPI11 27
0068 #define DA9052_IRQ_GPI12 28
0069 #define DA9052_IRQ_GPI13 29
0070 #define DA9052_IRQ_GPI14 30
0071 #define DA9052_IRQ_GPI15 31
0072
0073 enum da9052_chip_id {
0074 DA9052,
0075 DA9053_AA,
0076 DA9053_BA,
0077 DA9053_BB,
0078 DA9053_BC,
0079 };
0080
0081 struct da9052_pdata;
0082
0083 struct da9052 {
0084 struct device *dev;
0085 struct regmap *regmap;
0086
0087 struct mutex auxadc_lock;
0088 struct completion done;
0089
0090 int irq_base;
0091 struct regmap_irq_chip_data *irq_data;
0092 u8 chip_id;
0093
0094 int chip_irq;
0095
0096
0097 int (*fix_io) (struct da9052 *da9052, unsigned char reg);
0098 };
0099
0100
0101 int da9052_adc_manual_read(struct da9052 *da9052, unsigned char channel);
0102 int da9052_adc_read_temp(struct da9052 *da9052);
0103
0104
0105 static inline int da9052_reg_read(struct da9052 *da9052, unsigned char reg)
0106 {
0107 int val, ret;
0108
0109 ret = regmap_read(da9052->regmap, reg, &val);
0110 if (ret < 0)
0111 return ret;
0112
0113 if (da9052->fix_io) {
0114 ret = da9052->fix_io(da9052, reg);
0115 if (ret < 0)
0116 return ret;
0117 }
0118
0119 return val;
0120 }
0121
0122 static inline int da9052_reg_write(struct da9052 *da9052, unsigned char reg,
0123 unsigned char val)
0124 {
0125 int ret;
0126
0127 ret = regmap_write(da9052->regmap, reg, val);
0128 if (ret < 0)
0129 return ret;
0130
0131 if (da9052->fix_io) {
0132 ret = da9052->fix_io(da9052, reg);
0133 if (ret < 0)
0134 return ret;
0135 }
0136
0137 return ret;
0138 }
0139
0140 static inline int da9052_group_read(struct da9052 *da9052, unsigned char reg,
0141 unsigned reg_cnt, unsigned char *val)
0142 {
0143 int ret;
0144 unsigned int tmp;
0145 int i;
0146
0147 for (i = 0; i < reg_cnt; i++) {
0148 ret = regmap_read(da9052->regmap, reg + i, &tmp);
0149 val[i] = (unsigned char)tmp;
0150 if (ret < 0)
0151 return ret;
0152 }
0153
0154 if (da9052->fix_io) {
0155 ret = da9052->fix_io(da9052, reg);
0156 if (ret < 0)
0157 return ret;
0158 }
0159
0160 return ret;
0161 }
0162
0163 static inline int da9052_group_write(struct da9052 *da9052, unsigned char reg,
0164 unsigned reg_cnt, unsigned char *val)
0165 {
0166 int ret = 0;
0167 int i;
0168
0169 for (i = 0; i < reg_cnt; i++) {
0170 ret = regmap_write(da9052->regmap, reg + i, val[i]);
0171 if (ret < 0)
0172 return ret;
0173 }
0174
0175 if (da9052->fix_io) {
0176 ret = da9052->fix_io(da9052, reg);
0177 if (ret < 0)
0178 return ret;
0179 }
0180
0181 return ret;
0182 }
0183
0184 static inline int da9052_reg_update(struct da9052 *da9052, unsigned char reg,
0185 unsigned char bit_mask,
0186 unsigned char reg_val)
0187 {
0188 int ret;
0189
0190 ret = regmap_update_bits(da9052->regmap, reg, bit_mask, reg_val);
0191 if (ret < 0)
0192 return ret;
0193
0194 if (da9052->fix_io) {
0195 ret = da9052->fix_io(da9052, reg);
0196 if (ret < 0)
0197 return ret;
0198 }
0199
0200 return ret;
0201 }
0202
0203 int da9052_device_init(struct da9052 *da9052, u8 chip_id);
0204 void da9052_device_exit(struct da9052 *da9052);
0205
0206 extern const struct regmap_config da9052_regmap_config;
0207
0208 int da9052_irq_init(struct da9052 *da9052);
0209 int da9052_irq_exit(struct da9052 *da9052);
0210 int da9052_request_irq(struct da9052 *da9052, int irq, char *name,
0211 irq_handler_t handler, void *data);
0212 void da9052_free_irq(struct da9052 *da9052, int irq, void *data);
0213
0214 int da9052_enable_irq(struct da9052 *da9052, int irq);
0215 int da9052_disable_irq(struct da9052 *da9052, int irq);
0216 int da9052_disable_irq_nosync(struct da9052 *da9052, int irq);
0217
0218 #endif