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0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Functions and registers to access AC100 codec / RTC combo IC.
0004  *
0005  * Copyright (C) 2016 Chen-Yu Tsai
0006  *
0007  * Chen-Yu Tsai <wens@csie.org>
0008  */
0009 
0010 #ifndef __LINUX_MFD_AC100_H
0011 #define __LINUX_MFD_AC100_H
0012 
0013 #include <linux/regmap.h>
0014 
0015 struct ac100_dev {
0016     struct device           *dev;
0017     struct regmap           *regmap;
0018 };
0019 
0020 /* Audio codec related registers */
0021 #define AC100_CHIP_AUDIO_RST        0x00
0022 #define AC100_PLL_CTRL1         0x01
0023 #define AC100_PLL_CTRL2         0x02
0024 #define AC100_SYSCLK_CTRL       0x03
0025 #define AC100_MOD_CLK_ENA       0x04
0026 #define AC100_MOD_RST_CTRL      0x05
0027 #define AC100_I2S_SR_CTRL       0x06
0028 
0029 /* I2S1 interface */
0030 #define AC100_I2S1_CLK_CTRL     0x10
0031 #define AC100_I2S1_SND_OUT_CTRL     0x11
0032 #define AC100_I2S1_SND_IN_CTRL      0x12
0033 #define AC100_I2S1_MXR_SRC      0x13
0034 #define AC100_I2S1_VOL_CTRL1        0x14
0035 #define AC100_I2S1_VOL_CTRL2        0x15
0036 #define AC100_I2S1_VOL_CTRL3        0x16
0037 #define AC100_I2S1_VOL_CTRL4        0x17
0038 #define AC100_I2S1_MXR_GAIN     0x18
0039 
0040 /* I2S2 interface */
0041 #define AC100_I2S2_CLK_CTRL     0x20
0042 #define AC100_I2S2_SND_OUT_CTRL     0x21
0043 #define AC100_I2S2_SND_IN_CTRL      0x22
0044 #define AC100_I2S2_MXR_SRC      0x23
0045 #define AC100_I2S2_VOL_CTRL1        0x24
0046 #define AC100_I2S2_VOL_CTRL2        0x25
0047 #define AC100_I2S2_VOL_CTRL3        0x26
0048 #define AC100_I2S2_VOL_CTRL4        0x27
0049 #define AC100_I2S2_MXR_GAIN     0x28
0050 
0051 /* I2S3 interface */
0052 #define AC100_I2S3_CLK_CTRL     0x30
0053 #define AC100_I2S3_SND_OUT_CTRL     0x31
0054 #define AC100_I2S3_SND_IN_CTRL      0x32
0055 #define AC100_I2S3_SIG_PATH_CTRL    0x33
0056 
0057 /* ADC digital controls */
0058 #define AC100_ADC_DIG_CTRL      0x40
0059 #define AC100_ADC_VOL_CTRL      0x41
0060 
0061 /* HMIC plug sensing / key detection */
0062 #define AC100_HMIC_CTRL1        0x44
0063 #define AC100_HMIC_CTRL2        0x45
0064 #define AC100_HMIC_STATUS       0x46
0065 
0066 /* DAC digital controls */
0067 #define AC100_DAC_DIG_CTRL      0x48
0068 #define AC100_DAC_VOL_CTRL      0x49
0069 #define AC100_DAC_MXR_SRC       0x4c
0070 #define AC100_DAC_MXR_GAIN      0x4d
0071 
0072 /* Analog controls */
0073 #define AC100_ADC_APC_CTRL      0x50
0074 #define AC100_ADC_SRC           0x51
0075 #define AC100_ADC_SRC_BST_CTRL      0x52
0076 #define AC100_OUT_MXR_DAC_A_CTRL    0x53
0077 #define AC100_OUT_MXR_SRC       0x54
0078 #define AC100_OUT_MXR_SRC_BST       0x55
0079 #define AC100_HPOUT_CTRL        0x56
0080 #define AC100_ERPOUT_CTRL       0x57
0081 #define AC100_SPKOUT_CTRL       0x58
0082 #define AC100_LINEOUT_CTRL      0x59
0083 
0084 /* ADC digital audio processing (high pass filter & auto gain control */
0085 #define AC100_ADC_DAP_L_STA     0x80
0086 #define AC100_ADC_DAP_R_STA     0x81
0087 #define AC100_ADC_DAP_L_CTRL        0x82
0088 #define AC100_ADC_DAP_R_CTRL        0x83
0089 #define AC100_ADC_DAP_L_T_L     0x84 /* Left Target Level */
0090 #define AC100_ADC_DAP_R_T_L     0x85 /* Right Target Level */
0091 #define AC100_ADC_DAP_L_H_A_C       0x86 /* Left High Avg. Coef */
0092 #define AC100_ADC_DAP_L_L_A_C       0x87 /* Left Low Avg. Coef */
0093 #define AC100_ADC_DAP_R_H_A_C       0x88 /* Right High Avg. Coef */
0094 #define AC100_ADC_DAP_R_L_A_C       0x89 /* Right Low Avg. Coef */
0095 #define AC100_ADC_DAP_L_D_T     0x8a /* Left Decay Time */
0096 #define AC100_ADC_DAP_L_A_T     0x8b /* Left Attack Time */
0097 #define AC100_ADC_DAP_R_D_T     0x8c /* Right Decay Time */
0098 #define AC100_ADC_DAP_R_A_T     0x8d /* Right Attack Time */
0099 #define AC100_ADC_DAP_N_TH      0x8e /* Noise Threshold */
0100 #define AC100_ADC_DAP_L_H_N_A_C     0x8f /* Left High Noise Avg. Coef */
0101 #define AC100_ADC_DAP_L_L_N_A_C     0x90 /* Left Low Noise Avg. Coef */
0102 #define AC100_ADC_DAP_R_H_N_A_C     0x91 /* Right High Noise Avg. Coef */
0103 #define AC100_ADC_DAP_R_L_N_A_C     0x92 /* Right Low Noise Avg. Coef */
0104 #define AC100_ADC_DAP_H_HPF_C       0x93 /* High High-Pass-Filter Coef */
0105 #define AC100_ADC_DAP_L_HPF_C       0x94 /* Low High-Pass-Filter Coef */
0106 #define AC100_ADC_DAP_OPT       0x95 /* AGC Optimum */
0107 
0108 /* DAC digital audio processing (high pass filter & dynamic range control) */
0109 #define AC100_DAC_DAP_CTRL      0xa0
0110 #define AC100_DAC_DAP_H_HPF_C       0xa1 /* High High-Pass-Filter Coef */
0111 #define AC100_DAC_DAP_L_HPF_C       0xa2 /* Low High-Pass-Filter Coef */
0112 #define AC100_DAC_DAP_L_H_E_A_C     0xa3 /* Left High Energy Avg Coef */
0113 #define AC100_DAC_DAP_L_L_E_A_C     0xa4 /* Left Low Energy Avg Coef */
0114 #define AC100_DAC_DAP_R_H_E_A_C     0xa5 /* Right High Energy Avg Coef */
0115 #define AC100_DAC_DAP_R_L_E_A_C     0xa6 /* Right Low Energy Avg Coef */
0116 #define AC100_DAC_DAP_H_G_D_T_C     0xa7 /* High Gain Delay Time Coef */
0117 #define AC100_DAC_DAP_L_G_D_T_C     0xa8 /* Low Gain Delay Time Coef */
0118 #define AC100_DAC_DAP_H_G_A_T_C     0xa9 /* High Gain Attack Time Coef */
0119 #define AC100_DAC_DAP_L_G_A_T_C     0xaa /* Low Gain Attack Time Coef */
0120 #define AC100_DAC_DAP_H_E_TH        0xab /* High Energy Threshold */
0121 #define AC100_DAC_DAP_L_E_TH        0xac /* Low Energy Threshold */
0122 #define AC100_DAC_DAP_H_G_K     0xad /* High Gain K parameter */
0123 #define AC100_DAC_DAP_L_G_K     0xae /* Low Gain K parameter */
0124 #define AC100_DAC_DAP_H_G_OFF       0xaf /* High Gain offset */
0125 #define AC100_DAC_DAP_L_G_OFF       0xb0 /* Low Gain offset */
0126 #define AC100_DAC_DAP_OPT       0xb1 /* DRC optimum */
0127 
0128 /* Digital audio processing enable */
0129 #define AC100_ADC_DAP_ENA       0xb4
0130 #define AC100_DAC_DAP_ENA       0xb5
0131 
0132 /* SRC control */
0133 #define AC100_SRC1_CTRL1        0xb8
0134 #define AC100_SRC1_CTRL2        0xb9
0135 #define AC100_SRC1_CTRL3        0xba
0136 #define AC100_SRC1_CTRL4        0xbb
0137 #define AC100_SRC2_CTRL1        0xbc
0138 #define AC100_SRC2_CTRL2        0xbd
0139 #define AC100_SRC2_CTRL3        0xbe
0140 #define AC100_SRC2_CTRL4        0xbf
0141 
0142 /* RTC clk control */
0143 #define AC100_CLK32K_ANALOG_CTRL    0xc0
0144 #define AC100_CLKOUT_CTRL1      0xc1
0145 #define AC100_CLKOUT_CTRL2      0xc2
0146 #define AC100_CLKOUT_CTRL3      0xc3
0147 
0148 /* RTC module */
0149 #define AC100_RTC_RST           0xc6
0150 #define AC100_RTC_CTRL          0xc7
0151 #define AC100_RTC_SEC           0xc8 /* second */
0152 #define AC100_RTC_MIN           0xc9 /* minute */
0153 #define AC100_RTC_HOU           0xca /* hour */
0154 #define AC100_RTC_WEE           0xcb /* weekday */
0155 #define AC100_RTC_DAY           0xcc /* day */
0156 #define AC100_RTC_MON           0xcd /* month */
0157 #define AC100_RTC_YEA           0xce /* year */
0158 #define AC100_RTC_UPD           0xcf /* update trigger */
0159 
0160 /* RTC alarm */
0161 #define AC100_ALM_INT_ENA       0xd0
0162 #define AC100_ALM_INT_STA       0xd1
0163 #define AC100_ALM_SEC           0xd8
0164 #define AC100_ALM_MIN           0xd9
0165 #define AC100_ALM_HOU           0xda
0166 #define AC100_ALM_WEE           0xdb
0167 #define AC100_ALM_DAY           0xdc
0168 #define AC100_ALM_MON           0xdd
0169 #define AC100_ALM_YEA           0xde
0170 #define AC100_ALM_UPD           0xdf
0171 
0172 /* RTC general purpose register 0 ~ 15 */
0173 #define AC100_RTC_GP(x)         (0xe0 + (x))
0174 
0175 #endif /* __LINUX_MFD_AC100_H */