include/linux/mbus.h

0001 /*
0002  * Marvell MBUS common definitions.
0003  *
0004  * Copyright (C) 2008 Marvell Semiconductor
0005  *
0006  * This file is licensed under the terms of the GNU General Public
0007  * License version 2.  This program is licensed "as is" without any
0008  * warranty of any kind, whether express or implied.
0009  */
0010
0011 #ifndef __LINUX_MBUS_H
0012 #define __LINUX_MBUS_H
0013
0014 #include <linux/errno.h>
0015
0016 struct resource;
0017
0018 struct mbus_dram_target_info
0019 {
0020     /*
0021      * The 4-bit MBUS target ID of the DRAM controller.
0022      */
0023     u8      mbus_dram_target_id;
0024
0025     /*
0026      * The base address, size, and MBUS attribute ID for each
0027      * of the possible DRAM chip selects.  Peripherals are
0028      * required to support at least 4 decode windows.
0029      */
0030     int     num_cs;
0031     struct mbus_dram_window {
0032         u8  cs_index;
0033         u8  mbus_attr;
0034         u64 base;
0035         u64 size;
0036     } cs[4];
0037 };
0038
0039 /* Flags for PCI/PCIe address decoding regions */
0040 #define MVEBU_MBUS_PCI_IO  0x1
0041 #define MVEBU_MBUS_PCI_MEM 0x2
0042 #define MVEBU_MBUS_PCI_WA  0x3
0043
0044 /*
0045  * Magic value that explicits that we don't need a remapping-capable
0046  * address decoding window.
0047  */
0048 #define MVEBU_MBUS_NO_REMAP (0xffffffff)
0049
0050 /* Maximum size of a mbus window name */
0051 #define MVEBU_MBUS_MAX_WINNAME_SZ 32
0052
0053 /*
0054  * The Marvell mbus is to be found only on SOCs from the Orion family
0055  * at the moment.  Provide a dummy stub for other architectures.
0056  */
0057 #ifdef CONFIG_PLAT_ORION
0058 extern const struct mbus_dram_target_info *mv_mbus_dram_info(void);
0059 extern const struct mbus_dram_target_info *mv_mbus_dram_info_nooverlap(void);
0060 int mvebu_mbus_get_io_win_info(phys_addr_t phyaddr, u32 *size, u8 *target,
0061                    u8 *attr);
0062 #else
0063 static inline const struct mbus_dram_target_info *mv_mbus_dram_info(void)
0064 {
0065     return NULL;
0066 }
0067 static inline const struct mbus_dram_target_info *mv_mbus_dram_info_nooverlap(void)
0068 {
0069     return NULL;
0070 }
0071 static inline int mvebu_mbus_get_io_win_info(phys_addr_t phyaddr, u32 *size,
0072                          u8 *target, u8 *attr)
0073 {
0074     /*
0075      * On all ARM32 MVEBU platforms with MBus support, this stub
0076      * function will not get called. The real function from the
0077      * MBus driver is called instead. ARM64 MVEBU platforms like
0078      * the Armada 3700 could use the mv_xor device driver which calls
0079      * into this function
0080      */
0081     return -EINVAL;
0082 }
0083 #endif
0084
0085 #ifdef CONFIG_MVEBU_MBUS
0086 int mvebu_mbus_save_cpu_target(u32 __iomem *store_addr);
0087 void mvebu_mbus_get_pcie_mem_aperture(struct resource *res);
0088 void mvebu_mbus_get_pcie_io_aperture(struct resource *res);
0089 int mvebu_mbus_get_dram_win_info(phys_addr_t phyaddr, u8 *target, u8 *attr);
0090 int mvebu_mbus_add_window_remap_by_id(unsigned int target,
0091                       unsigned int attribute,
0092                       phys_addr_t base, size_t size,
0093                       phys_addr_t remap);
0094 int mvebu_mbus_add_window_by_id(unsigned int target, unsigned int attribute,
0095                 phys_addr_t base, size_t size);
0096 int mvebu_mbus_del_window(phys_addr_t base, size_t size);
0097 int mvebu_mbus_init(const char *soc, phys_addr_t mbus_phys_base,
0098             size_t mbus_size, phys_addr_t sdram_phys_base,
0099             size_t sdram_size);
0100 int mvebu_mbus_dt_init(bool is_coherent);
0101 #else
0102 static inline int mvebu_mbus_get_dram_win_info(phys_addr_t phyaddr, u8 *target,
0103                            u8 *attr)
0104 {
0105     return -EINVAL;
0106 }
0107 #endif /* CONFIG_MVEBU_MBUS */
0108
0109 #endif /* __LINUX_MBUS_H */