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0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (C) 2022 HiSilicon Limited.
0004  */
0005 
0006 #ifndef _KERNEL_DMA_BENCHMARK_H
0007 #define _KERNEL_DMA_BENCHMARK_H
0008 
0009 #define DMA_MAP_BENCHMARK       _IOWR('d', 1, struct map_benchmark)
0010 #define DMA_MAP_MAX_THREADS     1024
0011 #define DMA_MAP_MAX_SECONDS     300
0012 #define DMA_MAP_MAX_TRANS_DELAY (10 * NSEC_PER_MSEC)
0013 
0014 #define DMA_MAP_BIDIRECTIONAL   0
0015 #define DMA_MAP_TO_DEVICE       1
0016 #define DMA_MAP_FROM_DEVICE     2
0017 
0018 struct map_benchmark {
0019     __u64 avg_map_100ns; /* average map latency in 100ns */
0020     __u64 map_stddev; /* standard deviation of map latency */
0021     __u64 avg_unmap_100ns; /* as above */
0022     __u64 unmap_stddev;
0023     __u32 threads; /* how many threads will do map/unmap in parallel */
0024     __u32 seconds; /* how long the test will last */
0025     __s32 node; /* which numa node this benchmark will run on */
0026     __u32 dma_bits; /* DMA addressing capability */
0027     __u32 dma_dir; /* DMA data direction */
0028     __u32 dma_trans_ns; /* time for DMA transmission in ns */
0029     __u32 granule;  /* how many PAGE_SIZE will do map/unmap once a time */
0030 };
0031 #endif /* _KERNEL_DMA_BENCHMARK_H */