linux/mailbox/mtk-cmdq-mailbox.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Copyright (c) 2018 MediaTek Inc.
0004  *
0005  */
0006
0007 #ifndef __MTK_CMDQ_MAILBOX_H__
0008 #define __MTK_CMDQ_MAILBOX_H__
0009
0010 #include <linux/platform_device.h>
0011 #include <linux/slab.h>
0012 #include <linux/types.h>
0013
0014 #define CMDQ_INST_SIZE          8 /* instruction is 64-bit */
0015 #define CMDQ_SUBSYS_SHIFT       16
0016 #define CMDQ_OP_CODE_SHIFT      24
0017 #define CMDQ_JUMP_PASS          CMDQ_INST_SIZE
0018
0019 #define CMDQ_WFE_UPDATE         BIT(31)
0020 #define CMDQ_WFE_UPDATE_VALUE       BIT(16)
0021 #define CMDQ_WFE_WAIT           BIT(15)
0022 #define CMDQ_WFE_WAIT_VALUE     0x1
0023
0024 /*
0025  * WFE arg_b
0026  * bit 0-11: wait value
0027  * bit 15: 1 - wait, 0 - no wait
0028  * bit 16-27: update value
0029  * bit 31: 1 - update, 0 - no update
0030  */
0031 #define CMDQ_WFE_OPTION         (CMDQ_WFE_WAIT | CMDQ_WFE_WAIT_VALUE)
0032
0033 /** cmdq event maximum */
0034 #define CMDQ_MAX_EVENT          0x3ff
0035
0036 /*
0037  * CMDQ_CODE_MASK:
0038  *   set write mask
0039  *   format: op mask
0040  * CMDQ_CODE_WRITE:
0041  *   write value into target register
0042  *   format: op subsys address value
0043  * CMDQ_CODE_JUMP:
0044  *   jump by offset
0045  *   format: op offset
0046  * CMDQ_CODE_WFE:
0047  *   wait for event and clear
0048  *   it is just clear if no wait
0049  *   format: [wait]  op event update:1 to_wait:1 wait:1
0050  *           [clear] op event update:1 to_wait:0 wait:0
0051  * CMDQ_CODE_EOC:
0052  *   end of command
0053  *   format: op irq_flag
0054  */
0055 enum cmdq_code {
0056     CMDQ_CODE_MASK = 0x02,
0057     CMDQ_CODE_WRITE = 0x04,
0058     CMDQ_CODE_POLL = 0x08,
0059     CMDQ_CODE_JUMP = 0x10,
0060     CMDQ_CODE_WFE = 0x20,
0061     CMDQ_CODE_EOC = 0x40,
0062     CMDQ_CODE_READ_S = 0x80,
0063     CMDQ_CODE_WRITE_S = 0x90,
0064     CMDQ_CODE_WRITE_S_MASK = 0x91,
0065     CMDQ_CODE_LOGIC = 0xa0,
0066 };
0067
0068 struct cmdq_cb_data {
0069     int         sta;
0070     struct cmdq_pkt     *pkt;
0071 };
0072
0073 struct cmdq_pkt {
0074     void            *va_base;
0075     dma_addr_t      pa_base;
0076     size_t          cmd_buf_size; /* command occupied size */
0077     size_t          buf_size; /* real buffer size */
0078     void            *cl;
0079 };
0080
0081 u8 cmdq_get_shift_pa(struct mbox_chan *chan);
0082
0083 #endif /* __MTK_CMDQ_MAILBOX_H__ */