Back to home page

OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  *
0004  * Author   Karsten Keil <kkeil@novell.com>
0005  *
0006  *   Basic declarations for the mISDN HW channels
0007  *
0008  * Copyright 2008  by Karsten Keil <kkeil@novell.com>
0009  */
0010 
0011 #ifndef MISDNHW_H
0012 #define MISDNHW_H
0013 #include <linux/mISDNif.h>
0014 #include <linux/timer.h>
0015 
0016 /*
0017  * HW DEBUG 0xHHHHGGGG
0018  * H - hardware driver specific bits
0019  * G - for all drivers
0020  */
0021 
0022 #define DEBUG_HW        0x00000001
0023 #define DEBUG_HW_OPEN       0x00000002
0024 #define DEBUG_HW_DCHANNEL   0x00000100
0025 #define DEBUG_HW_DFIFO      0x00000200
0026 #define DEBUG_HW_BCHANNEL   0x00001000
0027 #define DEBUG_HW_BFIFO      0x00002000
0028 
0029 #define MAX_DFRAME_LEN_L1   300
0030 #define MAX_MON_FRAME       32
0031 #define MAX_LOG_SPACE       2048
0032 #define MISDN_COPY_SIZE     32
0033 
0034 /* channel->Flags bit field */
0035 #define FLG_TX_BUSY     0   /* tx_buf in use */
0036 #define FLG_TX_NEXT     1   /* next_skb in use */
0037 #define FLG_L1_BUSY     2   /* L1 is permanent busy */
0038 #define FLG_L2_ACTIVATED    3   /* activated from L2 */
0039 #define FLG_OPEN        5   /* channel is in use */
0040 #define FLG_ACTIVE      6   /* channel is activated */
0041 #define FLG_BUSY_TIMER      7
0042 /* channel type */
0043 #define FLG_DCHANNEL        8   /* channel is D-channel */
0044 #define FLG_BCHANNEL        9   /* channel is B-channel */
0045 #define FLG_ECHANNEL        10  /* channel is E-channel */
0046 #define FLG_TRANSPARENT     12  /* channel use transparent data */
0047 #define FLG_HDLC        13  /* channel use hdlc data */
0048 #define FLG_L2DATA      14  /* channel use L2 DATA primitivs */
0049 #define FLG_ORIGIN      15  /* channel is on origin site */
0050 /* channel specific stuff */
0051 #define FLG_FILLEMPTY       16  /* fill fifo on first frame (empty) */
0052 /* arcofi specific */
0053 #define FLG_ARCOFI_TIMER    17
0054 #define FLG_ARCOFI_ERROR    18
0055 /* isar specific */
0056 #define FLG_INITIALIZED     17
0057 #define FLG_DLEETX      18
0058 #define FLG_LASTDLE     19
0059 #define FLG_FIRST       20
0060 #define FLG_LASTDATA        21
0061 #define FLG_NMD_DATA        22
0062 #define FLG_FTI_RUN     23
0063 #define FLG_LL_OK       24
0064 #define FLG_LL_CONN     25
0065 #define FLG_DTMFSEND        26
0066 #define FLG_TX_EMPTY        27
0067 /* stop sending received data upstream */
0068 #define FLG_RX_OFF      28
0069 /* workq events */
0070 #define FLG_RECVQUEUE       30
0071 #define FLG_PHCHANGE        31
0072 
0073 #define schedule_event(s, ev)   do { \
0074                     test_and_set_bit(ev, &((s)->Flags)); \
0075                     schedule_work(&((s)->workq)); \
0076                 } while (0)
0077 
0078 struct dchannel {
0079     struct mISDNdevice  dev;
0080     u_long          Flags;
0081     struct work_struct  workq;
0082     void            (*phfunc) (struct dchannel *);
0083     u_int           state;
0084     void            *l1;
0085     void            *hw;
0086     int         slot;   /* multiport card channel slot */
0087     struct timer_list   timer;
0088     /* receive data */
0089     struct sk_buff      *rx_skb;
0090     int         maxlen;
0091     /* send data */
0092     struct sk_buff_head squeue;
0093     struct sk_buff_head rqueue;
0094     struct sk_buff      *tx_skb;
0095     int         tx_idx;
0096     int         debug;
0097     /* statistics */
0098     int         err_crc;
0099     int         err_tx;
0100     int         err_rx;
0101 };
0102 
0103 typedef int (dchannel_l1callback)(struct dchannel *, u_int);
0104 extern int  create_l1(struct dchannel *, dchannel_l1callback *);
0105 
0106 /* private L1 commands */
0107 #define INFO0       0x8002
0108 #define INFO1       0x8102
0109 #define INFO2       0x8202
0110 #define INFO3_P8    0x8302
0111 #define INFO3_P10   0x8402
0112 #define INFO4_P8    0x8502
0113 #define INFO4_P10   0x8602
0114 #define LOSTFRAMING 0x8702
0115 #define ANYSIGNAL   0x8802
0116 #define HW_POWERDOWN    0x8902
0117 #define HW_RESET_REQ    0x8a02
0118 #define HW_POWERUP_REQ  0x8b02
0119 #define HW_DEACT_REQ    0x8c02
0120 #define HW_ACTIVATE_REQ 0x8e02
0121 #define HW_D_NOBLOCKED  0x8f02
0122 #define HW_RESET_IND    0x9002
0123 #define HW_POWERUP_IND  0x9102
0124 #define HW_DEACT_IND    0x9202
0125 #define HW_ACTIVATE_IND 0x9302
0126 #define HW_DEACT_CNF    0x9402
0127 #define HW_TESTLOOP 0x9502
0128 #define HW_TESTRX_RAW   0x9602
0129 #define HW_TESTRX_HDLC  0x9702
0130 #define HW_TESTRX_OFF   0x9802
0131 #define HW_TIMER3_IND   0x9902
0132 #define HW_TIMER3_VALUE 0x9a00
0133 #define HW_TIMER3_VMASK 0x00FF
0134 
0135 struct layer1;
0136 extern int  l1_event(struct layer1 *, u_int);
0137 
0138 #define MISDN_BCH_FILL_SIZE 4
0139 
0140 struct bchannel {
0141     struct mISDNchannel ch;
0142     int         nr;
0143     u_long          Flags;
0144     struct work_struct  workq;
0145     u_int           state;
0146     void            *hw;
0147     int         slot;   /* multiport card channel slot */
0148     struct timer_list   timer;
0149     /* receive data */
0150     u8          fill[MISDN_BCH_FILL_SIZE];
0151     struct sk_buff      *rx_skb;
0152     unsigned short      maxlen;
0153     unsigned short      init_maxlen; /* initial value */
0154     unsigned short      next_maxlen; /* pending value */
0155     unsigned short      minlen; /* for transparent data */
0156     unsigned short      init_minlen; /* initial value */
0157     unsigned short      next_minlen; /* pending value */
0158     /* send data */
0159     struct sk_buff      *next_skb;
0160     struct sk_buff      *tx_skb;
0161     struct sk_buff_head rqueue;
0162     int         rcount;
0163     int         tx_idx;
0164     int         debug;
0165     /* statistics */
0166     int         err_crc;
0167     int         err_tx;
0168     int         err_rx;
0169     int         dropcnt;
0170 };
0171 
0172 extern int  mISDN_initdchannel(struct dchannel *, int, void *);
0173 extern int  mISDN_initbchannel(struct bchannel *, unsigned short,
0174                    unsigned short);
0175 extern int  mISDN_freedchannel(struct dchannel *);
0176 extern void mISDN_clear_bchannel(struct bchannel *);
0177 extern void mISDN_freebchannel(struct bchannel *);
0178 extern int  mISDN_ctrl_bchannel(struct bchannel *, struct mISDN_ctrl_req *);
0179 extern void queue_ch_frame(struct mISDNchannel *, u_int,
0180             int, struct sk_buff *);
0181 extern int  dchannel_senddata(struct dchannel *, struct sk_buff *);
0182 extern int  bchannel_senddata(struct bchannel *, struct sk_buff *);
0183 extern int      bchannel_get_rxbuf(struct bchannel *, int);
0184 extern void recv_Dchannel(struct dchannel *);
0185 extern void recv_Echannel(struct dchannel *, struct dchannel *);
0186 extern void recv_Bchannel(struct bchannel *, unsigned int, bool);
0187 extern void recv_Dchannel_skb(struct dchannel *, struct sk_buff *);
0188 extern void recv_Bchannel_skb(struct bchannel *, struct sk_buff *);
0189 extern int  get_next_bframe(struct bchannel *);
0190 extern int  get_next_dframe(struct dchannel *);
0191 
0192 #endif