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0001 /* SPDX-License-Identifier: GPL-2.0 */ 0002 #ifndef __LIS3LV02D_H_ 0003 #define __LIS3LV02D_H_ 0004 0005 /** 0006 * struct lis3lv02d_platform_data - lis3 chip family platform data 0007 * @click_flags: Click detection unit configuration 0008 * @click_thresh_x: Click detection unit x axis threshold 0009 * @click_thresh_y: Click detection unit y axis threshold 0010 * @click_thresh_z: Click detection unit z axis threshold 0011 * @click_time_limit: Click detection unit time parameter 0012 * @click_latency: Click detection unit latency parameter 0013 * @click_window: Click detection unit window parameter 0014 * @irq_cfg: On chip irq source and type configuration (click / 0015 * data available / wake up, open drain, polarity) 0016 * @irq_flags1: Additional irq triggering flags for irq channel 0 0017 * @irq_flags2: Additional irq triggering flags for irq channel 1 0018 * @duration1: Wake up unit 1 duration parameter 0019 * @duration2: Wake up unit 2 duration parameter 0020 * @wakeup_flags: Wake up unit 1 flags 0021 * @wakeup_thresh: Wake up unit 1 threshold value 0022 * @wakeup_flags2: Wake up unit 2 flags 0023 * @wakeup_thresh2: Wake up unit 2 threshold value 0024 * @hipass_ctrl: High pass filter control (enable / disable, cut off 0025 * frequency) 0026 * @axis_x: Sensor orientation remapping for x-axis 0027 * @axis_y: Sensor orientation remapping for y-axis 0028 * @axis_z: Sensor orientation remapping for z-axis 0029 * @driver_features: Enable bits for different features. Disabled by default 0030 * @default_rate: Default sampling rate. 0 means reset default 0031 * @setup_resources: Interrupt line setup call back function 0032 * @release_resources: Interrupt line release call back function 0033 * @st_min_limits[3]: Selftest acceptance minimum values 0034 * @st_max_limits[3]: Selftest acceptance maximum values 0035 * @irq2: Irq line 2 number 0036 * 0037 * Platform data is used to setup the sensor chip. Meaning of the different 0038 * chip features can be found from the data sheet. It is publicly available 0039 * at www.st.com web pages. Currently the platform data is used 0040 * only for the 8 bit device. The 8 bit device has two wake up / free fall 0041 * detection units and click detection unit. There are plenty of ways to 0042 * configure the chip which makes is quite hard to explain deeper meaning of 0043 * the fields here. Behaviour of the detection blocks varies heavily depending 0044 * on the configuration. For example, interrupt detection block can use high 0045 * pass filtered data which makes it react to the changes in the acceleration. 0046 * Irq_flags can be used to enable interrupt detection on the both edges. 0047 * With proper chip configuration this produces interrupt when some trigger 0048 * starts and when it goes away. 0049 */ 0050 0051 struct lis3lv02d_platform_data { 0052 /* please note: the 'click' feature is only supported for 0053 * LIS[32]02DL variants of the chip and will be ignored for 0054 * others */ 0055 #define LIS3_CLICK_SINGLE_X (1 << 0) 0056 #define LIS3_CLICK_DOUBLE_X (1 << 1) 0057 #define LIS3_CLICK_SINGLE_Y (1 << 2) 0058 #define LIS3_CLICK_DOUBLE_Y (1 << 3) 0059 #define LIS3_CLICK_SINGLE_Z (1 << 4) 0060 #define LIS3_CLICK_DOUBLE_Z (1 << 5) 0061 unsigned char click_flags; 0062 unsigned char click_thresh_x; 0063 unsigned char click_thresh_y; 0064 unsigned char click_thresh_z; 0065 unsigned char click_time_limit; 0066 unsigned char click_latency; 0067 unsigned char click_window; 0068 0069 #define LIS3_IRQ1_DISABLE (0 << 0) 0070 #define LIS3_IRQ1_FF_WU_1 (1 << 0) 0071 #define LIS3_IRQ1_FF_WU_2 (2 << 0) 0072 #define LIS3_IRQ1_FF_WU_12 (3 << 0) 0073 #define LIS3_IRQ1_DATA_READY (4 << 0) 0074 #define LIS3_IRQ1_CLICK (7 << 0) 0075 #define LIS3_IRQ1_MASK (7 << 0) 0076 #define LIS3_IRQ2_DISABLE (0 << 3) 0077 #define LIS3_IRQ2_FF_WU_1 (1 << 3) 0078 #define LIS3_IRQ2_FF_WU_2 (2 << 3) 0079 #define LIS3_IRQ2_FF_WU_12 (3 << 3) 0080 #define LIS3_IRQ2_DATA_READY (4 << 3) 0081 #define LIS3_IRQ2_CLICK (7 << 3) 0082 #define LIS3_IRQ2_MASK (7 << 3) 0083 #define LIS3_IRQ_OPEN_DRAIN (1 << 6) 0084 #define LIS3_IRQ_ACTIVE_LOW (1 << 7) 0085 unsigned char irq_cfg; 0086 unsigned char irq_flags1; /* Additional irq edge / level flags */ 0087 unsigned char irq_flags2; /* Additional irq edge / level flags */ 0088 unsigned char duration1; 0089 unsigned char duration2; 0090 #define LIS3_WAKEUP_X_LO (1 << 0) 0091 #define LIS3_WAKEUP_X_HI (1 << 1) 0092 #define LIS3_WAKEUP_Y_LO (1 << 2) 0093 #define LIS3_WAKEUP_Y_HI (1 << 3) 0094 #define LIS3_WAKEUP_Z_LO (1 << 4) 0095 #define LIS3_WAKEUP_Z_HI (1 << 5) 0096 unsigned char wakeup_flags; 0097 unsigned char wakeup_thresh; 0098 unsigned char wakeup_flags2; 0099 unsigned char wakeup_thresh2; 0100 #define LIS3_HIPASS_CUTFF_8HZ 0 0101 #define LIS3_HIPASS_CUTFF_4HZ 1 0102 #define LIS3_HIPASS_CUTFF_2HZ 2 0103 #define LIS3_HIPASS_CUTFF_1HZ 3 0104 #define LIS3_HIPASS1_DISABLE (1 << 2) 0105 #define LIS3_HIPASS2_DISABLE (1 << 3) 0106 unsigned char hipass_ctrl; 0107 #define LIS3_NO_MAP 0 0108 #define LIS3_DEV_X 1 0109 #define LIS3_DEV_Y 2 0110 #define LIS3_DEV_Z 3 0111 #define LIS3_INV_DEV_X -1 0112 #define LIS3_INV_DEV_Y -2 0113 #define LIS3_INV_DEV_Z -3 0114 s8 axis_x; 0115 s8 axis_y; 0116 s8 axis_z; 0117 #define LIS3_USE_BLOCK_READ 0x02 0118 u16 driver_features; 0119 int default_rate; 0120 int (*setup_resources)(void); 0121 int (*release_resources)(void); 0122 /* Limits for selftest are specified in chip data sheet */ 0123 s16 st_min_limits[3]; /* min pass limit x, y, z */ 0124 s16 st_max_limits[3]; /* max pass limit x, y, z */ 0125 int irq2; 0126 }; 0127 0128 #endif /* __LIS3LV02D_H_ */
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