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0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  *  LED driver for TI lp3952 controller
0004  *
0005  *  Copyright (C) 2016, DAQRI, LLC.
0006  *  Author: Tony Makkiel <tony.makkiel@daqri.com>
0007  */
0008 
0009 #ifndef LEDS_LP3952_H_
0010 #define LEDS_LP3952_H_
0011 
0012 #define LP3952_NAME                         "lp3952"
0013 #define LP3952_CMD_REG_COUNT                8
0014 #define LP3952_BRIGHT_MAX                   4
0015 #define LP3952_LABEL_MAX_LEN                15
0016 
0017 #define LP3952_REG_LED_CTRL                 0x00
0018 #define LP3952_REG_R1_BLNK_TIME_CTRL        0x01
0019 #define LP3952_REG_R1_BLNK_CYCLE_CTRL       0x02
0020 #define LP3952_REG_G1_BLNK_TIME_CTRL        0x03
0021 #define LP3952_REG_G1_BLNK_CYCLE_CTRL       0x04
0022 #define LP3952_REG_B1_BLNK_TIME_CTRL        0x05
0023 #define LP3952_REG_B1_BLNK_CYCLE_CTRL       0x06
0024 #define LP3952_REG_ENABLES                  0x0B
0025 #define LP3952_REG_PAT_GEN_CTRL             0x11
0026 #define LP3952_REG_RGB1_MAX_I_CTRL          0x12
0027 #define LP3952_REG_RGB2_MAX_I_CTRL          0x13
0028 #define LP3952_REG_CMD_0                    0x50
0029 #define LP3952_REG_RESET                    0x60
0030 #define REG_MAX                             LP3952_REG_RESET
0031 
0032 #define LP3952_PATRN_LOOP                   BIT(1)
0033 #define LP3952_PATRN_GEN_EN                 BIT(2)
0034 #define LP3952_INT_B00ST_LDR                BIT(2)
0035 #define LP3952_ACTIVE_MODE                  BIT(6)
0036 #define LP3952_LED_MASK_ALL                 0x3f
0037 
0038 /* Transition Time in ms */
0039 enum lp3952_tt {
0040     TT0,
0041     TT55,
0042     TT110,
0043     TT221,
0044     TT422,
0045     TT885,
0046     TT1770,
0047     TT3539
0048 };
0049 
0050 /* Command Execution Time in ms */
0051 enum lp3952_cet {
0052     CET197,
0053     CET393,
0054     CET590,
0055     CET786,
0056     CET1180,
0057     CET1376,
0058     CET1573,
0059     CET1769,
0060     CET1966,
0061     CET2163,
0062     CET2359,
0063     CET2556,
0064     CET2763,
0065     CET2949,
0066     CET3146
0067 };
0068 
0069 /* Max Current in % */
0070 enum lp3952_colour_I_log_0 {
0071     I0,
0072     I7,
0073     I14,
0074     I21,
0075     I32,
0076     I46,
0077     I71,
0078     I100
0079 };
0080 
0081 enum lp3952_leds {
0082     LP3952_BLUE_2,
0083     LP3952_GREEN_2,
0084     LP3952_RED_2,
0085     LP3952_BLUE_1,
0086     LP3952_GREEN_1,
0087     LP3952_RED_1,
0088     LP3952_LED_ALL
0089 };
0090 
0091 struct lp3952_ctrl_hdl {
0092     struct led_classdev cdev;
0093     char name[LP3952_LABEL_MAX_LEN];
0094     enum lp3952_leds channel;
0095     void *priv;
0096 };
0097 
0098 struct ptrn_gen_cmd {
0099     union {
0100         struct {
0101             u16 tt:3;
0102             u16 b:3;
0103             u16 cet:4;
0104             u16 g:3;
0105             u16 r:3;
0106         };
0107         struct {
0108             u8 lsb;
0109             u8 msb;
0110         } bytes;
0111     };
0112 } __packed;
0113 
0114 struct lp3952_led_array {
0115     struct regmap *regmap;
0116     struct i2c_client *client;
0117     struct gpio_desc *enable_gpio;
0118     struct lp3952_ctrl_hdl leds[LP3952_LED_ALL];
0119 };
0120 
0121 #endif /* LEDS_LP3952_H_ */