iio/timer/stm32-timer-trigger.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (C) STMicroelectronics 2016
0004  *
0005  * Author: Benjamin Gaignard <benjamin.gaignard@st.com>
0006  */
0007
0008 #ifndef _STM32_TIMER_TRIGGER_H_
0009 #define _STM32_TIMER_TRIGGER_H_
0010
0011 #define TIM1_TRGO   "tim1_trgo"
0012 #define TIM1_TRGO2  "tim1_trgo2"
0013 #define TIM1_CH1    "tim1_ch1"
0014 #define TIM1_CH2    "tim1_ch2"
0015 #define TIM1_CH3    "tim1_ch3"
0016 #define TIM1_CH4    "tim1_ch4"
0017
0018 #define TIM2_TRGO   "tim2_trgo"
0019 #define TIM2_CH1    "tim2_ch1"
0020 #define TIM2_CH2    "tim2_ch2"
0021 #define TIM2_CH3    "tim2_ch3"
0022 #define TIM2_CH4    "tim2_ch4"
0023
0024 #define TIM3_TRGO   "tim3_trgo"
0025 #define TIM3_CH1    "tim3_ch1"
0026 #define TIM3_CH2    "tim3_ch2"
0027 #define TIM3_CH3    "tim3_ch3"
0028 #define TIM3_CH4    "tim3_ch4"
0029
0030 #define TIM4_TRGO   "tim4_trgo"
0031 #define TIM4_CH1    "tim4_ch1"
0032 #define TIM4_CH2    "tim4_ch2"
0033 #define TIM4_CH3    "tim4_ch3"
0034 #define TIM4_CH4    "tim4_ch4"
0035
0036 #define TIM5_TRGO   "tim5_trgo"
0037 #define TIM5_CH1    "tim5_ch1"
0038 #define TIM5_CH2    "tim5_ch2"
0039 #define TIM5_CH3    "tim5_ch3"
0040 #define TIM5_CH4    "tim5_ch4"
0041
0042 #define TIM6_TRGO   "tim6_trgo"
0043
0044 #define TIM7_TRGO   "tim7_trgo"
0045
0046 #define TIM8_TRGO   "tim8_trgo"
0047 #define TIM8_TRGO2  "tim8_trgo2"
0048 #define TIM8_CH1    "tim8_ch1"
0049 #define TIM8_CH2    "tim8_ch2"
0050 #define TIM8_CH3    "tim8_ch3"
0051 #define TIM8_CH4    "tim8_ch4"
0052
0053 #define TIM9_TRGO   "tim9_trgo"
0054 #define TIM9_CH1    "tim9_ch1"
0055 #define TIM9_CH2    "tim9_ch2"
0056
0057 #define TIM10_OC1   "tim10_oc1"
0058
0059 #define TIM11_OC1   "tim11_oc1"
0060
0061 #define TIM12_TRGO  "tim12_trgo"
0062 #define TIM12_CH1   "tim12_ch1"
0063 #define TIM12_CH2   "tim12_ch2"
0064
0065 #define TIM13_OC1   "tim13_oc1"
0066
0067 #define TIM14_OC1   "tim14_oc1"
0068
0069 #define TIM15_TRGO  "tim15_trgo"
0070
0071 #define TIM16_OC1   "tim16_oc1"
0072
0073 #define TIM17_OC1   "tim17_oc1"
0074
0075 #if IS_REACHABLE(CONFIG_IIO_STM32_TIMER_TRIGGER)
0076 bool is_stm32_timer_trigger(struct iio_trigger *trig);
0077 #else
0078 static inline bool is_stm32_timer_trigger(struct iio_trigger *trig)
0079 {
0080 #if IS_ENABLED(CONFIG_IIO_STM32_TIMER_TRIGGER)
0081     pr_warn_once("stm32-timer-trigger not linked in\n");
0082 #endif
0083     return false;
0084 }
0085 #endif
0086 #endif