iio/gyro/itg3200.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * itg3200.h -- support InvenSense ITG3200
0004  *              Digital 3-Axis Gyroscope driver
0005  *
0006  * Copyright (c) 2011 Christian Strobel <christian.strobel@iis.fraunhofer.de>
0007  * Copyright (c) 2011 Manuel Stahl <manuel.stahl@iis.fraunhofer.de>
0008  * Copyright (c) 2012 Thorsten Nowak <thorsten.nowak@iis.fraunhofer.de>
0009  */
0010
0011 #ifndef I2C_ITG3200_H_
0012 #define I2C_ITG3200_H_
0013
0014 #include <linux/iio/iio.h>
0015
0016 /* Register with I2C address (34h) */
0017 #define ITG3200_REG_ADDRESS     0x00
0018
0019 /* Sample rate divider
0020  * Range: 0 to 255
0021  * Default value: 0x00 */
0022 #define ITG3200_REG_SAMPLE_RATE_DIV 0x15
0023
0024 /* Digital low pass filter settings */
0025 #define ITG3200_REG_DLPF        0x16
0026 /* DLPF full scale range */
0027 #define ITG3200_DLPF_FS_SEL_2000    0x18
0028 /* Bandwidth (Hz) and internal sample rate
0029  * (kHz) of DLPF */
0030 #define ITG3200_DLPF_256_8      0x00
0031 #define ITG3200_DLPF_188_1      0x01
0032 #define ITG3200_DLPF_98_1       0x02
0033 #define ITG3200_DLPF_42_1       0x03
0034 #define ITG3200_DLPF_20_1       0x04
0035 #define ITG3200_DLPF_10_1       0x05
0036 #define ITG3200_DLPF_5_1        0x06
0037
0038 #define ITG3200_DLPF_CFG_MASK       0x07
0039
0040 /* Configuration for interrupt operations */
0041 #define ITG3200_REG_IRQ_CONFIG      0x17
0042 /* Logic level */
0043 #define ITG3200_IRQ_ACTIVE_LOW      0x80
0044 #define ITG3200_IRQ_ACTIVE_HIGH     0x00
0045 /* Drive type */
0046 #define ITG3200_IRQ_OPEN_DRAIN      0x40
0047 #define ITG3200_IRQ_PUSH_PULL       0x00
0048 /* Latch mode */
0049 #define ITG3200_IRQ_LATCH_UNTIL_CLEARED 0x20
0050 #define ITG3200_IRQ_LATCH_50US_PULSE    0x00
0051 /* Latch clear method */
0052 #define ITG3200_IRQ_LATCH_CLEAR_ANY 0x10
0053 #define ITG3200_IRQ_LATCH_CLEAR_STATUS  0x00
0054 /* Enable interrupt when device is ready */
0055 #define ITG3200_IRQ_DEVICE_RDY_ENABLE   0x04
0056 /* Enable interrupt when data is available */
0057 #define ITG3200_IRQ_DATA_RDY_ENABLE 0x01
0058
0059 /* Determine the status of ITG-3200 interrupts */
0060 #define ITG3200_REG_IRQ_STATUS      0x1A
0061 /* Status of 'device is ready'-interrupt */
0062 #define ITG3200_IRQ_DEVICE_RDY_STATUS   0x04
0063 /* Status of 'data is available'-interrupt */
0064 #define ITG3200_IRQ_DATA_RDY_STATUS 0x01
0065
0066 /* Sensor registers */
0067 #define ITG3200_REG_TEMP_OUT_H      0x1B
0068 #define ITG3200_REG_TEMP_OUT_L      0x1C
0069 #define ITG3200_REG_GYRO_XOUT_H     0x1D
0070 #define ITG3200_REG_GYRO_XOUT_L     0x1E
0071 #define ITG3200_REG_GYRO_YOUT_H     0x1F
0072 #define ITG3200_REG_GYRO_YOUT_L     0x20
0073 #define ITG3200_REG_GYRO_ZOUT_H     0x21
0074 #define ITG3200_REG_GYRO_ZOUT_L     0x22
0075
0076 /* Power management */
0077 #define ITG3200_REG_POWER_MANAGEMENT    0x3E
0078 /* Reset device and internal registers to the
0079  * power-up-default settings */
0080 #define ITG3200_RESET           0x80
0081 /* Enable low power sleep mode */
0082 #define ITG3200_SLEEP           0x40
0083 /* Put according gyroscope in standby mode */
0084 #define ITG3200_STANDBY_GYRO_X      0x20
0085 #define ITG3200_STANDBY_GYRO_Y      0x10
0086 #define ITG3200_STANDBY_GYRO_Z      0x08
0087 /* Determine the device clock source */
0088 #define ITG3200_CLK_INTERNAL        0x00
0089 #define ITG3200_CLK_GYRO_X      0x01
0090 #define ITG3200_CLK_GYRO_Y      0x02
0091 #define ITG3200_CLK_GYRO_Z      0x03
0092 #define ITG3200_CLK_EXT_32K     0x04
0093 #define ITG3200_CLK_EXT_19M     0x05
0094
0095
0096 /**
0097  * struct itg3200 - device instance specific data
0098  * @i2c:    actual i2c_client
0099  * @trig:   data ready trigger from itg3200 pin
0100  **/
0101 struct itg3200 {
0102     struct i2c_client   *i2c;
0103     struct iio_trigger  *trig;
0104     struct iio_mount_matrix orientation;
0105 };
0106
0107 enum ITG3200_SCAN_INDEX {
0108     ITG3200_SCAN_TEMP,
0109     ITG3200_SCAN_GYRO_X,
0110     ITG3200_SCAN_GYRO_Y,
0111     ITG3200_SCAN_GYRO_Z,
0112     ITG3200_SCAN_ELEMENTS,
0113 };
0114
0115 int itg3200_write_reg_8(struct iio_dev *indio_dev,
0116         u8 reg_address, u8 val);
0117
0118 int itg3200_read_reg_8(struct iio_dev *indio_dev,
0119         u8 reg_address, u8 *val);
0120
0121
0122 #ifdef CONFIG_IIO_BUFFER
0123
0124 void itg3200_remove_trigger(struct iio_dev *indio_dev);
0125 int itg3200_probe_trigger(struct iio_dev *indio_dev);
0126
0127 int itg3200_buffer_configure(struct iio_dev *indio_dev);
0128 void itg3200_buffer_unconfigure(struct iio_dev *indio_dev);
0129
0130 #else /* CONFIG_IIO_BUFFER */
0131
0132 static inline void itg3200_remove_trigger(struct iio_dev *indio_dev)
0133 {
0134 }
0135
0136 static inline int itg3200_probe_trigger(struct iio_dev *indio_dev)
0137 {
0138     return 0;
0139 }
0140
0141 static inline int itg3200_buffer_configure(struct iio_dev *indio_dev)
0142 {
0143     return 0;
0144 }
0145
0146 static inline void itg3200_buffer_unconfigure(struct iio_dev *indio_dev)
0147 {
0148 }
0149
0150 #endif  /* CONFIG_IIO_BUFFER */
0151
0152 #endif /* ITG3200_H_ */