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0001 /* SPDX-License-Identifier: GPL-2.0-only */ 0002 0003 #ifndef _LINUX_GPIO_REGMAP_H 0004 #define _LINUX_GPIO_REGMAP_H 0005 0006 struct device; 0007 struct fwnode_handle; 0008 struct gpio_regmap; 0009 struct irq_domain; 0010 struct regmap; 0011 0012 #define GPIO_REGMAP_ADDR_ZERO ((unsigned int)(-1)) 0013 #define GPIO_REGMAP_ADDR(addr) ((addr) ? : GPIO_REGMAP_ADDR_ZERO) 0014 0015 /** 0016 * struct gpio_regmap_config - Description of a generic regmap gpio_chip. 0017 * @parent: The parent device 0018 * @regmap: The regmap used to access the registers 0019 * given, the name of the device is used 0020 * @fwnode: (Optional) The firmware node. 0021 * If not given, the fwnode of the parent is used. 0022 * @label: (Optional) Descriptive name for GPIO controller. 0023 * If not given, the name of the device is used. 0024 * @ngpio: Number of GPIOs 0025 * @names: (Optional) Array of names for gpios 0026 * @reg_dat_base: (Optional) (in) register base address 0027 * @reg_set_base: (Optional) set register base address 0028 * @reg_clr_base: (Optional) clear register base address 0029 * @reg_dir_in_base: (Optional) in setting register base address 0030 * @reg_dir_out_base: (Optional) out setting register base address 0031 * @reg_stride: (Optional) May be set if the registers (of the 0032 * same type, dat, set, etc) are not consecutive. 0033 * @ngpio_per_reg: Number of GPIOs per register 0034 * @irq_domain: (Optional) IRQ domain if the controller is 0035 * interrupt-capable 0036 * @reg_mask_xlate: (Optional) Translates base address and GPIO 0037 * offset to a register/bitmask pair. If not 0038 * given the default gpio_regmap_simple_xlate() 0039 * is used. 0040 * @drvdata: (Optional) Pointer to driver specific data which is 0041 * not used by gpio-remap but is provided "as is" to the 0042 * driver callback(s). 0043 * 0044 * The ->reg_mask_xlate translates a given base address and GPIO offset to 0045 * register and mask pair. The base address is one of the given register 0046 * base addresses in this structure. 0047 * 0048 * Although all register base addresses are marked as optional, there are 0049 * several rules: 0050 * 1. if you only have @reg_dat_base set, then it is input-only 0051 * 2. if you only have @reg_set_base set, then it is output-only 0052 * 3. if you have either @reg_dir_in_base or @reg_dir_out_base set, then 0053 * you have to set both @reg_dat_base and @reg_set_base 0054 * 4. if you have @reg_set_base set, you may also set @reg_clr_base to have 0055 * two different registers for setting and clearing the output. This is 0056 * also valid for the output-only case. 0057 * 5. @reg_dir_in_base and @reg_dir_out_base are exclusive; is there really 0058 * hardware which has redundant registers? 0059 * 0060 * Note: All base addresses may have the special value %GPIO_REGMAP_ADDR_ZERO 0061 * which forces the address to the value 0. 0062 */ 0063 struct gpio_regmap_config { 0064 struct device *parent; 0065 struct regmap *regmap; 0066 struct fwnode_handle *fwnode; 0067 0068 const char *label; 0069 int ngpio; 0070 const char *const *names; 0071 0072 unsigned int reg_dat_base; 0073 unsigned int reg_set_base; 0074 unsigned int reg_clr_base; 0075 unsigned int reg_dir_in_base; 0076 unsigned int reg_dir_out_base; 0077 int reg_stride; 0078 int ngpio_per_reg; 0079 struct irq_domain *irq_domain; 0080 0081 int (*reg_mask_xlate)(struct gpio_regmap *gpio, unsigned int base, 0082 unsigned int offset, unsigned int *reg, 0083 unsigned int *mask); 0084 0085 void *drvdata; 0086 }; 0087 0088 struct gpio_regmap *gpio_regmap_register(const struct gpio_regmap_config *config); 0089 void gpio_regmap_unregister(struct gpio_regmap *gpio); 0090 struct gpio_regmap *devm_gpio_regmap_register(struct device *dev, 0091 const struct gpio_regmap_config *config); 0092 void *gpio_regmap_get_drvdata(struct gpio_regmap *gpio); 0093 0094 #endif /* _LINUX_GPIO_REGMAP_H */
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