include/linux/fsl-diu-fb.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
0004  *
0005  *  Freescale DIU Frame Buffer device driver
0006  *
0007  *  Authors: Hongjun Chen <hong-jun.chen@freescale.com>
0008  *           Paul Widmer <paul.widmer@freescale.com>
0009  *           Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
0010  *           York Sun <yorksun@freescale.com>
0011  *
0012  *   Based on imxfb.c Copyright (C) 2004 S.Hauer, Pengutronix
0013  */
0014
0015 #ifndef __FSL_DIU_FB_H__
0016 #define __FSL_DIU_FB_H__
0017
0018 #include <linux/types.h>
0019
0020 struct mfb_chroma_key {
0021     int enable;
0022     __u8  red_max;
0023     __u8  green_max;
0024     __u8  blue_max;
0025     __u8  red_min;
0026     __u8  green_min;
0027     __u8  blue_min;
0028 };
0029
0030 struct aoi_display_offset {
0031     __s32 x_aoi_d;
0032     __s32 y_aoi_d;
0033 };
0034
0035 #define MFB_SET_CHROMA_KEY  _IOW('M', 1, struct mfb_chroma_key)
0036 #define MFB_SET_BRIGHTNESS  _IOW('M', 3, __u8)
0037 #define MFB_SET_ALPHA       _IOW('M', 0, __u8)
0038 #define MFB_GET_ALPHA       _IOR('M', 0, __u8)
0039 #define MFB_SET_AOID        _IOW('M', 4, struct aoi_display_offset)
0040 #define MFB_GET_AOID        _IOR('M', 4, struct aoi_display_offset)
0041 #define MFB_SET_PIXFMT      _IOW('M', 8, __u32)
0042 #define MFB_GET_PIXFMT      _IOR('M', 8, __u32)
0043
0044 /*
0045  * The MPC5121 BSP comes with a gamma_set utility that initializes the
0046  * gamma table.  Unfortunately, it uses bad values for the IOCTL commands,
0047  * but there's nothing we can do about it now.  These ioctls are only
0048  * supported on the MPC5121.
0049  */
0050 #define MFB_SET_GAMMA       _IOW('M', 1, __u8)
0051 #define MFB_GET_GAMMA       _IOR('M', 1, __u8)
0052
0053 /*
0054  * The original definitions of MFB_SET_PIXFMT and MFB_GET_PIXFMT used the
0055  * wrong value for 'size' field of the ioctl.  The current macros above use the
0056  * right size, but we still need to provide backwards compatibility, at least
0057  * for a while.
0058 */
0059 #define MFB_SET_PIXFMT_OLD  0x80014d08
0060 #define MFB_GET_PIXFMT_OLD  0x40014d08
0061
0062 #ifdef __KERNEL__
0063
0064 /*
0065  * These are the fields of area descriptor(in DDR memory) for every plane
0066  */
0067 struct diu_ad {
0068     /* Word 0(32-bit) in DDR memory */
0069 /*  __u16 comp; */
0070 /*  __u16 pixel_s:2; */
0071 /*  __u16 palette:1; */
0072 /*  __u16 red_c:2; */
0073 /*  __u16 green_c:2; */
0074 /*  __u16 blue_c:2; */
0075 /*  __u16 alpha_c:3; */
0076 /*  __u16 byte_f:1; */
0077 /*  __u16 res0:3; */
0078
0079     __be32 pix_fmt; /* hard coding pixel format */
0080
0081     /* Word 1(32-bit) in DDR memory */
0082     __le32 addr;
0083
0084     /* Word 2(32-bit) in DDR memory */
0085 /*  __u32 delta_xs:11; */
0086 /*  __u32 res1:1; */
0087 /*  __u32 delta_ys:11; */
0088 /*  __u32 res2:1; */
0089 /*  __u32 g_alpha:8; */
0090     __le32 src_size_g_alpha;
0091
0092     /* Word 3(32-bit) in DDR memory */
0093 /*  __u32 delta_xi:11; */
0094 /*  __u32 res3:5; */
0095 /*  __u32 delta_yi:11; */
0096 /*  __u32 res4:3; */
0097 /*  __u32 flip:2; */
0098     __le32 aoi_size;
0099
0100     /* Word 4(32-bit) in DDR memory */
0101     /*__u32 offset_xi:11;
0102     __u32 res5:5;
0103     __u32 offset_yi:11;
0104     __u32 res6:5;
0105     */
0106     __le32 offset_xyi;
0107
0108     /* Word 5(32-bit) in DDR memory */
0109     /*__u32 offset_xd:11;
0110     __u32 res7:5;
0111     __u32 offset_yd:11;
0112     __u32 res8:5; */
0113     __le32 offset_xyd;
0114
0115
0116     /* Word 6(32-bit) in DDR memory */
0117     __u8 ckmax_r;
0118     __u8 ckmax_g;
0119     __u8 ckmax_b;
0120     __u8 res9;
0121
0122     /* Word 7(32-bit) in DDR memory */
0123     __u8 ckmin_r;
0124     __u8 ckmin_g;
0125     __u8 ckmin_b;
0126     __u8 res10;
0127 /*  __u32 res10:8; */
0128
0129     /* Word 8(32-bit) in DDR memory */
0130     __le32 next_ad;
0131
0132     /* Word 9(32-bit) in DDR memory, just for 64-bit aligned */
0133     __u32 paddr;
0134 } __attribute__ ((packed));
0135
0136 /* DIU register map */
0137 struct diu {
0138     __be32 desc[3];
0139     __be32 gamma;
0140     __be32 palette;
0141     __be32 cursor;
0142     __be32 curs_pos;
0143     __be32 diu_mode;
0144     __be32 bgnd;
0145     __be32 bgnd_wb;
0146     __be32 disp_size;
0147     __be32 wb_size;
0148     __be32 wb_mem_addr;
0149     __be32 hsyn_para;
0150     __be32 vsyn_para;
0151     __be32 syn_pol;
0152     __be32 thresholds;
0153     __be32 int_status;
0154     __be32 int_mask;
0155     __be32 colorbar[8];
0156     __be32 filling;
0157     __be32 plut;
0158 } __attribute__ ((packed));
0159
0160 /*
0161  * Modes of operation of DIU.  The DIU supports five different modes, but
0162  * the driver only supports modes 0 and 1.
0163  */
0164 #define MFB_MODE0   0   /* DIU off */
0165 #define MFB_MODE1   1   /* All three planes output to display */
0166
0167 #endif /* __KERNEL__ */
0168 #endif /* __FSL_DIU_FB_H__ */