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0017 #define PCI_EEPROM_WIDTH_93C46 6
0018 #define PCI_EEPROM_WIDTH_93C56 8
0019 #define PCI_EEPROM_WIDTH_93C66 8
0020 #define PCI_EEPROM_WIDTH_93C86 8
0021 #define PCI_EEPROM_WIDTH_OPCODE 3
0022 #define PCI_EEPROM_WRITE_OPCODE 0x05
0023 #define PCI_EEPROM_ERASE_OPCODE 0x07
0024 #define PCI_EEPROM_READ_OPCODE 0x06
0025 #define PCI_EEPROM_EWDS_OPCODE 0x10
0026 #define PCI_EEPROM_EWEN_OPCODE 0x13
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0046 struct eeprom_93cx6 {
0047 void *data;
0048
0049 void (*register_read)(struct eeprom_93cx6 *eeprom);
0050 void (*register_write)(struct eeprom_93cx6 *eeprom);
0051
0052 int width;
0053
0054 char drive_data;
0055 char reg_data_in;
0056 char reg_data_out;
0057 char reg_data_clock;
0058 char reg_chip_select;
0059 };
0060
0061 extern void eeprom_93cx6_read(struct eeprom_93cx6 *eeprom,
0062 const u8 word, u16 *data);
0063 extern void eeprom_93cx6_multiread(struct eeprom_93cx6 *eeprom,
0064 const u8 word, __le16 *data, const u16 words);
0065 extern void eeprom_93cx6_readb(struct eeprom_93cx6 *eeprom,
0066 const u8 byte, u8 *data);
0067 extern void eeprom_93cx6_multireadb(struct eeprom_93cx6 *eeprom,
0068 const u8 byte, u8 *data, const u16 bytes);
0069
0070 extern void eeprom_93cx6_wren(struct eeprom_93cx6 *eeprom, bool enable);
0071
0072 extern void eeprom_93cx6_write(struct eeprom_93cx6 *eeprom,
0073 u8 addr, u16 data);