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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Copyright (c) 2018-2019 Synopsys, Inc. and/or its affiliates.
0004  * Synopsys DesignWare eDMA core driver
0005  *
0006  * Author: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
0007  */
0008 
0009 #ifndef _DW_EDMA_H
0010 #define _DW_EDMA_H
0011 
0012 #include <linux/device.h>
0013 #include <linux/dmaengine.h>
0014 
0015 #define EDMA_MAX_WR_CH                                  8
0016 #define EDMA_MAX_RD_CH                                  8
0017 
0018 struct dw_edma;
0019 
0020 struct dw_edma_region {
0021     phys_addr_t paddr;
0022     void __iomem    *vaddr;
0023     size_t      sz;
0024 };
0025 
0026 struct dw_edma_core_ops {
0027     int (*irq_vector)(struct device *dev, unsigned int nr);
0028 };
0029 
0030 enum dw_edma_map_format {
0031     EDMA_MF_EDMA_LEGACY = 0x0,
0032     EDMA_MF_EDMA_UNROLL = 0x1,
0033     EDMA_MF_HDMA_COMPAT = 0x5
0034 };
0035 
0036 /**
0037  * enum dw_edma_chip_flags - Flags specific to an eDMA chip
0038  * @DW_EDMA_CHIP_LOCAL:     eDMA is used locally by an endpoint
0039  */
0040 enum dw_edma_chip_flags {
0041     DW_EDMA_CHIP_LOCAL  = BIT(0),
0042 };
0043 
0044 /**
0045  * struct dw_edma_chip - representation of DesignWare eDMA controller hardware
0046  * @dev:         struct device of the eDMA controller
0047  * @id:          instance ID
0048  * @nr_irqs:         total number of DMA IRQs
0049  * @ops          DMA channel to IRQ number mapping
0050  * @flags        dw_edma_chip_flags
0051  * @reg_base         DMA register base address
0052  * @ll_wr_cnt        DMA write link list count
0053  * @ll_rd_cnt        DMA read link list count
0054  * @rg_region        DMA register region
0055  * @ll_region_wr     DMA descriptor link list memory for write channel
0056  * @ll_region_rd     DMA descriptor link list memory for read channel
0057  * @dt_region_wr     DMA data memory for write channel
0058  * @dt_region_rd     DMA data memory for read channel
0059  * @mf           DMA register map format
0060  * @dw:          struct dw_edma that is filled by dw_edma_probe()
0061  */
0062 struct dw_edma_chip {
0063     struct device       *dev;
0064     int         id;
0065     int         nr_irqs;
0066     const struct dw_edma_core_ops   *ops;
0067     u32         flags;
0068 
0069     void __iomem        *reg_base;
0070 
0071     u16         ll_wr_cnt;
0072     u16         ll_rd_cnt;
0073     /* link list address */
0074     struct dw_edma_region   ll_region_wr[EDMA_MAX_WR_CH];
0075     struct dw_edma_region   ll_region_rd[EDMA_MAX_RD_CH];
0076 
0077     /* data region */
0078     struct dw_edma_region   dt_region_wr[EDMA_MAX_WR_CH];
0079     struct dw_edma_region   dt_region_rd[EDMA_MAX_RD_CH];
0080 
0081     enum dw_edma_map_format mf;
0082 
0083     struct dw_edma      *dw;
0084 };
0085 
0086 /* Export to the platform drivers */
0087 #if IS_ENABLED(CONFIG_DW_EDMA)
0088 int dw_edma_probe(struct dw_edma_chip *chip);
0089 int dw_edma_remove(struct dw_edma_chip *chip);
0090 #else
0091 static inline int dw_edma_probe(struct dw_edma_chip *chip)
0092 {
0093     return -ENODEV;
0094 }
0095 
0096 static inline int dw_edma_remove(struct dw_edma_chip *chip)
0097 {
0098     return 0;
0099 }
0100 #endif /* CONFIG_DW_EDMA */
0101 
0102 #endif /* _DW_EDMA_H */