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0001 /* SPDX-License-Identifier: GPL-2.0 */ 0002 #ifndef _CAN_PLATFORM_CC770_H 0003 #define _CAN_PLATFORM_CC770_H 0004 0005 /* CPU Interface Register (0x02) */ 0006 #define CPUIF_CEN 0x01 /* Clock Out Enable */ 0007 #define CPUIF_MUX 0x04 /* Multiplex */ 0008 #define CPUIF_SLP 0x08 /* Sleep */ 0009 #define CPUIF_PWD 0x10 /* Power Down Mode */ 0010 #define CPUIF_DMC 0x20 /* Divide Memory Clock */ 0011 #define CPUIF_DSC 0x40 /* Divide System Clock */ 0012 #define CPUIF_RST 0x80 /* Hardware Reset Status */ 0013 0014 /* Clock Out Register (0x1f) */ 0015 #define CLKOUT_CD_MASK 0x0f /* Clock Divider mask */ 0016 #define CLKOUT_SL_MASK 0x30 /* Slew Rate mask */ 0017 #define CLKOUT_SL_SHIFT 4 0018 0019 /* Bus Configuration Register (0x2f) */ 0020 #define BUSCFG_DR0 0x01 /* Disconnect RX0 Input / Select RX input */ 0021 #define BUSCFG_DR1 0x02 /* Disconnect RX1 Input / Silent mode */ 0022 #define BUSCFG_DT1 0x08 /* Disconnect TX1 Output */ 0023 #define BUSCFG_POL 0x20 /* Polarity dominant or recessive */ 0024 #define BUSCFG_CBY 0x40 /* Input Comparator Bypass */ 0025 0026 struct cc770_platform_data { 0027 u32 osc_freq; /* CAN bus oscillator frequency in Hz */ 0028 0029 u8 cir; /* CPU Interface Register */ 0030 u8 cor; /* Clock Out Register */ 0031 u8 bcr; /* Bus Configuration Register */ 0032 }; 0033 0034 #endif /* !_CAN_PLATFORM_CC770_H */
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