0001
0002 #ifndef LINUX_BCMA_DRIVER_GMAC_CMN_H_
0003 #define LINUX_BCMA_DRIVER_GMAC_CMN_H_
0004
0005 #include <linux/types.h>
0006
0007 #define BCMA_GMAC_CMN_STAG0 0x000
0008 #define BCMA_GMAC_CMN_STAG1 0x004
0009 #define BCMA_GMAC_CMN_STAG2 0x008
0010 #define BCMA_GMAC_CMN_STAG3 0x00C
0011 #define BCMA_GMAC_CMN_PARSER_CTL 0x020
0012 #define BCMA_GMAC_CMN_MIB_MAX_LEN 0x024
0013 #define BCMA_GMAC_CMN_PHY_ACCESS 0x100
0014 #define BCMA_GMAC_CMN_PA_DATA_MASK 0x0000ffff
0015 #define BCMA_GMAC_CMN_PA_ADDR_MASK 0x001f0000
0016 #define BCMA_GMAC_CMN_PA_ADDR_SHIFT 16
0017 #define BCMA_GMAC_CMN_PA_REG_MASK 0x1f000000
0018 #define BCMA_GMAC_CMN_PA_REG_SHIFT 24
0019 #define BCMA_GMAC_CMN_PA_WRITE 0x20000000
0020 #define BCMA_GMAC_CMN_PA_START 0x40000000
0021 #define BCMA_GMAC_CMN_PHY_CTL 0x104
0022 #define BCMA_GMAC_CMN_PC_EPA_MASK 0x0000001f
0023 #define BCMA_GMAC_CMN_PC_MCT_MASK 0x007f0000
0024 #define BCMA_GMAC_CMN_PC_MCT_SHIFT 16
0025 #define BCMA_GMAC_CMN_PC_MTE 0x00800000
0026 #define BCMA_GMAC_CMN_GMAC0_RGMII_CTL 0x110
0027 #define BCMA_GMAC_CMN_CFP_ACCESS 0x200
0028 #define BCMA_GMAC_CMN_CFP_TCAM_DATA0 0x210
0029 #define BCMA_GMAC_CMN_CFP_TCAM_DATA1 0x214
0030 #define BCMA_GMAC_CMN_CFP_TCAM_DATA2 0x218
0031 #define BCMA_GMAC_CMN_CFP_TCAM_DATA3 0x21C
0032 #define BCMA_GMAC_CMN_CFP_TCAM_DATA4 0x220
0033 #define BCMA_GMAC_CMN_CFP_TCAM_DATA5 0x224
0034 #define BCMA_GMAC_CMN_CFP_TCAM_DATA6 0x228
0035 #define BCMA_GMAC_CMN_CFP_TCAM_DATA7 0x22C
0036 #define BCMA_GMAC_CMN_CFP_TCAM_MASK0 0x230
0037 #define BCMA_GMAC_CMN_CFP_TCAM_MASK1 0x234
0038 #define BCMA_GMAC_CMN_CFP_TCAM_MASK2 0x238
0039 #define BCMA_GMAC_CMN_CFP_TCAM_MASK3 0x23C
0040 #define BCMA_GMAC_CMN_CFP_TCAM_MASK4 0x240
0041 #define BCMA_GMAC_CMN_CFP_TCAM_MASK5 0x244
0042 #define BCMA_GMAC_CMN_CFP_TCAM_MASK6 0x248
0043 #define BCMA_GMAC_CMN_CFP_TCAM_MASK7 0x24C
0044 #define BCMA_GMAC_CMN_CFP_ACTION_DATA 0x250
0045 #define BCMA_GMAC_CMN_TCAM_BIST_CTL 0x2A0
0046 #define BCMA_GMAC_CMN_TCAM_BIST_STATUS 0x2A4
0047 #define BCMA_GMAC_CMN_TCAM_CMP_STATUS 0x2A8
0048 #define BCMA_GMAC_CMN_TCAM_DISABLE 0x2AC
0049 #define BCMA_GMAC_CMN_TCAM_TEST_CTL 0x2F0
0050 #define BCMA_GMAC_CMN_UDF_0_A3_A0 0x300
0051 #define BCMA_GMAC_CMN_UDF_0_A7_A4 0x304
0052 #define BCMA_GMAC_CMN_UDF_0_A8 0x308
0053 #define BCMA_GMAC_CMN_UDF_1_A3_A0 0x310
0054 #define BCMA_GMAC_CMN_UDF_1_A7_A4 0x314
0055 #define BCMA_GMAC_CMN_UDF_1_A8 0x318
0056 #define BCMA_GMAC_CMN_UDF_2_A3_A0 0x320
0057 #define BCMA_GMAC_CMN_UDF_2_A7_A4 0x324
0058 #define BCMA_GMAC_CMN_UDF_2_A8 0x328
0059 #define BCMA_GMAC_CMN_UDF_0_B3_B0 0x330
0060 #define BCMA_GMAC_CMN_UDF_0_B7_B4 0x334
0061 #define BCMA_GMAC_CMN_UDF_0_B8 0x338
0062 #define BCMA_GMAC_CMN_UDF_1_B3_B0 0x340
0063 #define BCMA_GMAC_CMN_UDF_1_B7_B4 0x344
0064 #define BCMA_GMAC_CMN_UDF_1_B8 0x348
0065 #define BCMA_GMAC_CMN_UDF_2_B3_B0 0x350
0066 #define BCMA_GMAC_CMN_UDF_2_B7_B4 0x354
0067 #define BCMA_GMAC_CMN_UDF_2_B8 0x358
0068 #define BCMA_GMAC_CMN_UDF_0_C3_C0 0x360
0069 #define BCMA_GMAC_CMN_UDF_0_C7_C4 0x364
0070 #define BCMA_GMAC_CMN_UDF_0_C8 0x368
0071 #define BCMA_GMAC_CMN_UDF_1_C3_C0 0x370
0072 #define BCMA_GMAC_CMN_UDF_1_C7_C4 0x374
0073 #define BCMA_GMAC_CMN_UDF_1_C8 0x378
0074 #define BCMA_GMAC_CMN_UDF_2_C3_C0 0x380
0075 #define BCMA_GMAC_CMN_UDF_2_C7_C4 0x384
0076 #define BCMA_GMAC_CMN_UDF_2_C8 0x388
0077 #define BCMA_GMAC_CMN_UDF_0_D3_D0 0x390
0078 #define BCMA_GMAC_CMN_UDF_0_D7_D4 0x394
0079 #define BCMA_GMAC_CMN_UDF_0_D11_D8 0x394
0080
0081 struct bcma_drv_gmac_cmn {
0082 struct bcma_device *core;
0083
0084
0085
0086 struct mutex phy_mutex;
0087 };
0088
0089
0090 #define gmac_cmn_read16(gc, offset) bcma_read16((gc)->core, offset)
0091 #define gmac_cmn_read32(gc, offset) bcma_read32((gc)->core, offset)
0092 #define gmac_cmn_write16(gc, offset, val) bcma_write16((gc)->core, offset, val)
0093 #define gmac_cmn_write32(gc, offset, val) bcma_write32((gc)->core, offset, val)
0094
0095 #endif