linux/bcma/bcma.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef LINUX_BCMA_H_
0003 #define LINUX_BCMA_H_
0004
0005 #include <linux/pci.h>
0006 #include <linux/mod_devicetable.h>
0007
0008 #include <linux/bcma/bcma_driver_arm_c9.h>
0009 #include <linux/bcma/bcma_driver_chipcommon.h>
0010 #include <linux/bcma/bcma_driver_pci.h>
0011 #include <linux/bcma/bcma_driver_pcie2.h>
0012 #include <linux/bcma/bcma_driver_mips.h>
0013 #include <linux/bcma/bcma_driver_gmac_cmn.h>
0014 #include <linux/ssb/ssb.h> /* SPROM sharing */
0015
0016 #include <linux/bcma/bcma_regs.h>
0017
0018 struct bcma_device;
0019 struct bcma_bus;
0020
0021 enum bcma_hosttype {
0022     BCMA_HOSTTYPE_PCI,
0023     BCMA_HOSTTYPE_SDIO,
0024     BCMA_HOSTTYPE_SOC,
0025 };
0026
0027 struct bcma_chipinfo {
0028     u16 id;
0029     u8 rev;
0030     u8 pkg;
0031 };
0032
0033 struct bcma_boardinfo {
0034     u16 vendor;
0035     u16 type;
0036 };
0037
0038 enum bcma_clkmode {
0039     BCMA_CLKMODE_FAST,
0040     BCMA_CLKMODE_DYNAMIC,
0041 };
0042
0043 struct bcma_host_ops {
0044     u8 (*read8)(struct bcma_device *core, u16 offset);
0045     u16 (*read16)(struct bcma_device *core, u16 offset);
0046     u32 (*read32)(struct bcma_device *core, u16 offset);
0047     void (*write8)(struct bcma_device *core, u16 offset, u8 value);
0048     void (*write16)(struct bcma_device *core, u16 offset, u16 value);
0049     void (*write32)(struct bcma_device *core, u16 offset, u32 value);
0050 #ifdef CONFIG_BCMA_BLOCKIO
0051     void (*block_read)(struct bcma_device *core, void *buffer,
0052                size_t count, u16 offset, u8 reg_width);
0053     void (*block_write)(struct bcma_device *core, const void *buffer,
0054                 size_t count, u16 offset, u8 reg_width);
0055 #endif
0056     /* Agent ops */
0057     u32 (*aread32)(struct bcma_device *core, u16 offset);
0058     void (*awrite32)(struct bcma_device *core, u16 offset, u32 value);
0059 };
0060
0061 /* Core manufacturers */
0062 #define BCMA_MANUF_ARM          0x43B
0063 #define BCMA_MANUF_MIPS         0x4A7
0064 #define BCMA_MANUF_BCM          0x4BF
0065
0066 /* Core class values. */
0067 #define BCMA_CL_SIM         0x0
0068 #define BCMA_CL_EROM            0x1
0069 #define BCMA_CL_CORESIGHT       0x9
0070 #define BCMA_CL_VERIF           0xB
0071 #define BCMA_CL_OPTIMO          0xD
0072 #define BCMA_CL_GEN         0xE
0073 #define BCMA_CL_PRIMECELL       0xF
0074
0075 /* Core-ID values. */
0076 #define BCMA_CORE_OOB_ROUTER        0x367   /* Out of band */
0077 #define BCMA_CORE_4706_CHIPCOMMON   0x500
0078 #define BCMA_CORE_NS_PCIEG2     0x501
0079 #define BCMA_CORE_NS_DMA        0x502
0080 #define BCMA_CORE_NS_SDIO3      0x503
0081 #define BCMA_CORE_NS_USB20      0x504
0082 #define BCMA_CORE_NS_USB30      0x505
0083 #define BCMA_CORE_NS_A9JTAG     0x506
0084 #define BCMA_CORE_NS_DDR23      0x507
0085 #define BCMA_CORE_NS_ROM        0x508
0086 #define BCMA_CORE_NS_NAND       0x509
0087 #define BCMA_CORE_NS_QSPI       0x50A
0088 #define BCMA_CORE_NS_CHIPCOMMON_B   0x50B
0089 #define BCMA_CORE_4706_SOC_RAM      0x50E
0090 #define BCMA_CORE_ARMCA9        0x510
0091 #define BCMA_CORE_4706_MAC_GBIT     0x52D
0092 #define BCMA_CORE_AMEMC         0x52E   /* DDR1/2 memory controller core */
0093 #define BCMA_CORE_ALTA          0x534   /* I2S core */
0094 #define BCMA_CORE_4706_MAC_GBIT_COMMON  0x5DC
0095 #define BCMA_CORE_DDR23_PHY     0x5DD
0096 #define BCMA_CORE_INVALID       0x700
0097 #define BCMA_CORE_CHIPCOMMON        0x800
0098 #define BCMA_CORE_ILINE20       0x801
0099 #define BCMA_CORE_SRAM          0x802
0100 #define BCMA_CORE_SDRAM         0x803
0101 #define BCMA_CORE_PCI           0x804
0102 #define BCMA_CORE_MIPS          0x805
0103 #define BCMA_CORE_ETHERNET      0x806
0104 #define BCMA_CORE_V90           0x807
0105 #define BCMA_CORE_USB11_HOSTDEV     0x808
0106 #define BCMA_CORE_ADSL          0x809
0107 #define BCMA_CORE_ILINE100      0x80A
0108 #define BCMA_CORE_IPSEC         0x80B
0109 #define BCMA_CORE_UTOPIA        0x80C
0110 #define BCMA_CORE_PCMCIA        0x80D
0111 #define BCMA_CORE_INTERNAL_MEM      0x80E
0112 #define BCMA_CORE_MEMC_SDRAM        0x80F
0113 #define BCMA_CORE_OFDM          0x810
0114 #define BCMA_CORE_EXTIF         0x811
0115 #define BCMA_CORE_80211         0x812
0116 #define BCMA_CORE_PHY_A         0x813
0117 #define BCMA_CORE_PHY_B         0x814
0118 #define BCMA_CORE_PHY_G         0x815
0119 #define BCMA_CORE_MIPS_3302     0x816
0120 #define BCMA_CORE_USB11_HOST        0x817
0121 #define BCMA_CORE_USB11_DEV     0x818
0122 #define BCMA_CORE_USB20_HOST        0x819
0123 #define BCMA_CORE_USB20_DEV     0x81A
0124 #define BCMA_CORE_SDIO_HOST     0x81B
0125 #define BCMA_CORE_ROBOSWITCH        0x81C
0126 #define BCMA_CORE_PARA_ATA      0x81D
0127 #define BCMA_CORE_SATA_XORDMA       0x81E
0128 #define BCMA_CORE_ETHERNET_GBIT     0x81F
0129 #define BCMA_CORE_PCIE          0x820
0130 #define BCMA_CORE_PHY_N         0x821
0131 #define BCMA_CORE_SRAM_CTL      0x822
0132 #define BCMA_CORE_MINI_MACPHY       0x823
0133 #define BCMA_CORE_ARM_1176      0x824
0134 #define BCMA_CORE_ARM_7TDMI     0x825
0135 #define BCMA_CORE_PHY_LP        0x826
0136 #define BCMA_CORE_PMU           0x827
0137 #define BCMA_CORE_PHY_SSN       0x828
0138 #define BCMA_CORE_SDIO_DEV      0x829
0139 #define BCMA_CORE_ARM_CM3       0x82A
0140 #define BCMA_CORE_PHY_HT        0x82B
0141 #define BCMA_CORE_MIPS_74K      0x82C
0142 #define BCMA_CORE_MAC_GBIT      0x82D
0143 #define BCMA_CORE_DDR12_MEM_CTL     0x82E
0144 #define BCMA_CORE_PCIE_RC       0x82F   /* PCIe Root Complex */
0145 #define BCMA_CORE_OCP_OCP_BRIDGE    0x830
0146 #define BCMA_CORE_SHARED_COMMON     0x831
0147 #define BCMA_CORE_OCP_AHB_BRIDGE    0x832
0148 #define BCMA_CORE_SPI_HOST      0x833
0149 #define BCMA_CORE_I2S           0x834
0150 #define BCMA_CORE_SDR_DDR1_MEM_CTL  0x835   /* SDR/DDR1 memory controller core */
0151 #define BCMA_CORE_SHIM          0x837   /* SHIM component in ubus/6362 */
0152 #define BCMA_CORE_PHY_AC        0x83B
0153 #define BCMA_CORE_PCIE2         0x83C   /* PCI Express Gen2 */
0154 #define BCMA_CORE_USB30_DEV     0x83D
0155 #define BCMA_CORE_ARM_CR4       0x83E
0156 #define BCMA_CORE_GCI           0x840
0157 #define BCMA_CORE_CMEM          0x846   /* CNDS DDR2/3 memory controller */
0158 #define BCMA_CORE_ARM_CA7       0x847
0159 #define BCMA_CORE_SYS_MEM       0x849
0160 #define BCMA_CORE_DEFAULT       0xFFF
0161
0162 #define BCMA_MAX_NR_CORES       16
0163 #define BCMA_CORE_SIZE          0x1000
0164
0165 /* Chip IDs of PCIe devices */
0166 #define BCMA_CHIP_ID_BCM4313    0x4313
0167 #define BCMA_CHIP_ID_BCM43142   43142
0168 #define BCMA_CHIP_ID_BCM43131   43131
0169 #define BCMA_CHIP_ID_BCM43217   43217
0170 #define BCMA_CHIP_ID_BCM43222   43222
0171 #define BCMA_CHIP_ID_BCM43224   43224
0172 #define  BCMA_PKG_ID_BCM43224_FAB_CSM   0x8
0173 #define  BCMA_PKG_ID_BCM43224_FAB_SMIC  0xa
0174 #define BCMA_CHIP_ID_BCM43225   43225
0175 #define BCMA_CHIP_ID_BCM43227   43227
0176 #define BCMA_CHIP_ID_BCM43228   43228
0177 #define BCMA_CHIP_ID_BCM43421   43421
0178 #define BCMA_CHIP_ID_BCM43428   43428
0179 #define BCMA_CHIP_ID_BCM43431   43431
0180 #define BCMA_CHIP_ID_BCM43460   43460
0181 #define BCMA_CHIP_ID_BCM4331    0x4331
0182 #define BCMA_CHIP_ID_BCM6362    0x6362
0183 #define BCMA_CHIP_ID_BCM4360    0x4360
0184 #define BCMA_CHIP_ID_BCM4352    0x4352
0185
0186 /* Chip IDs of SoCs */
0187 #define BCMA_CHIP_ID_BCM4706    0x5300
0188 #define  BCMA_PKG_ID_BCM4706L   1
0189 #define BCMA_CHIP_ID_BCM4716    0x4716
0190 #define  BCMA_PKG_ID_BCM4716    8
0191 #define  BCMA_PKG_ID_BCM4717    9
0192 #define  BCMA_PKG_ID_BCM4718    10
0193 #define BCMA_CHIP_ID_BCM47162   47162
0194 #define BCMA_CHIP_ID_BCM4748    0x4748
0195 #define BCMA_CHIP_ID_BCM4749    0x4749
0196 #define BCMA_CHIP_ID_BCM5356    0x5356
0197 #define BCMA_CHIP_ID_BCM5357    0x5357
0198 #define  BCMA_PKG_ID_BCM5358    9
0199 #define  BCMA_PKG_ID_BCM47186   10
0200 #define  BCMA_PKG_ID_BCM5357    11
0201 #define BCMA_CHIP_ID_BCM53572   53572
0202 #define  BCMA_PKG_ID_BCM47188   9
0203 #define BCMA_CHIP_ID_BCM4707    53010
0204 #define  BCMA_PKG_ID_BCM4707    1
0205 #define  BCMA_PKG_ID_BCM4708    2
0206 #define  BCMA_PKG_ID_BCM4709    0
0207 #define BCMA_CHIP_ID_BCM47094   53030
0208 #define BCMA_CHIP_ID_BCM53018   53018
0209 #define BCMA_CHIP_ID_BCM53573   53573
0210 #define  BCMA_PKG_ID_BCM53573   0
0211 #define  BCMA_PKG_ID_BCM47189   1
0212
0213 /* Board types (on PCI usually equals to the subsystem dev id) */
0214 /* BCM4313 */
0215 #define BCMA_BOARD_TYPE_BCM94313BU  0X050F
0216 #define BCMA_BOARD_TYPE_BCM94313HM  0X0510
0217 #define BCMA_BOARD_TYPE_BCM94313EPA 0X0511
0218 #define BCMA_BOARD_TYPE_BCM94313HMG 0X051C
0219 /* BCM4716 */
0220 #define BCMA_BOARD_TYPE_BCM94716NR2 0X04CD
0221 /* BCM43224 */
0222 #define BCMA_BOARD_TYPE_BCM943224X21    0X056E
0223 #define BCMA_BOARD_TYPE_BCM943224X21_FCC    0X00D1
0224 #define BCMA_BOARD_TYPE_BCM943224X21B   0X00E9
0225 #define BCMA_BOARD_TYPE_BCM943224M93    0X008B
0226 #define BCMA_BOARD_TYPE_BCM943224M93A   0X0090
0227 #define BCMA_BOARD_TYPE_BCM943224X16    0X0093
0228 #define BCMA_BOARD_TYPE_BCM94322X9  0X008D
0229 #define BCMA_BOARD_TYPE_BCM94322M35E    0X008E
0230 /* BCM43228 */
0231 #define BCMA_BOARD_TYPE_BCM943228BU8    0X0540
0232 #define BCMA_BOARD_TYPE_BCM943228BU9    0X0541
0233 #define BCMA_BOARD_TYPE_BCM943228BU 0X0542
0234 #define BCMA_BOARD_TYPE_BCM943227HM4L   0X0543
0235 #define BCMA_BOARD_TYPE_BCM943227HMB    0X0544
0236 #define BCMA_BOARD_TYPE_BCM943228HM4L   0X0545
0237 #define BCMA_BOARD_TYPE_BCM943228SD 0X0573
0238 /* BCM4331 */
0239 #define BCMA_BOARD_TYPE_BCM94331X19 0X00D6
0240 #define BCMA_BOARD_TYPE_BCM94331X28 0X00E4
0241 #define BCMA_BOARD_TYPE_BCM94331X28B    0X010E
0242 #define BCMA_BOARD_TYPE_BCM94331PCIEBT3AX   0X00E4
0243 #define BCMA_BOARD_TYPE_BCM94331X12_2G  0X00EC
0244 #define BCMA_BOARD_TYPE_BCM94331X12_5G  0X00ED
0245 #define BCMA_BOARD_TYPE_BCM94331X29B    0X00EF
0246 #define BCMA_BOARD_TYPE_BCM94331CSAX    0X00EF
0247 #define BCMA_BOARD_TYPE_BCM94331X19C    0X00F5
0248 #define BCMA_BOARD_TYPE_BCM94331X33 0X00F4
0249 #define BCMA_BOARD_TYPE_BCM94331BU  0X0523
0250 #define BCMA_BOARD_TYPE_BCM94331S9BU    0X0524
0251 #define BCMA_BOARD_TYPE_BCM94331MC  0X0525
0252 #define BCMA_BOARD_TYPE_BCM94331MCI 0X0526
0253 #define BCMA_BOARD_TYPE_BCM94331PCIEBT4 0X0527
0254 #define BCMA_BOARD_TYPE_BCM94331HM  0X0574
0255 #define BCMA_BOARD_TYPE_BCM94331PCIEDUAL    0X059B
0256 #define BCMA_BOARD_TYPE_BCM94331MCH5    0X05A9
0257 #define BCMA_BOARD_TYPE_BCM94331CS  0X05C6
0258 #define BCMA_BOARD_TYPE_BCM94331CD  0X05DA
0259 /* BCM53572 */
0260 #define BCMA_BOARD_TYPE_BCM953572BU 0X058D
0261 #define BCMA_BOARD_TYPE_BCM953572NR2    0X058E
0262 #define BCMA_BOARD_TYPE_BCM947188NR2    0X058F
0263 #define BCMA_BOARD_TYPE_BCM953572SDRNR2 0X0590
0264 /* BCM43142 */
0265 #define BCMA_BOARD_TYPE_BCM943142HM 0X05E0
0266
0267 struct bcma_device {
0268     struct bcma_bus *bus;
0269     struct bcma_device_id id;
0270
0271     struct device dev;
0272     struct device *dma_dev;
0273
0274     unsigned int irq;
0275     bool dev_registered;
0276
0277     u8 core_index;
0278     u8 core_unit;
0279
0280     u32 addr;
0281     u32 addr_s[8];
0282     u32 wrap;
0283
0284     void __iomem *io_addr;
0285     void __iomem *io_wrap;
0286
0287     void *drvdata;
0288     struct list_head list;
0289 };
0290
0291 static inline void *bcma_get_drvdata(struct bcma_device *core)
0292 {
0293     return core->drvdata;
0294 }
0295 static inline void bcma_set_drvdata(struct bcma_device *core, void *drvdata)
0296 {
0297     core->drvdata = drvdata;
0298 }
0299
0300 struct bcma_driver {
0301     const char *name;
0302     const struct bcma_device_id *id_table;
0303
0304     int (*probe)(struct bcma_device *dev);
0305     void (*remove)(struct bcma_device *dev);
0306     int (*suspend)(struct bcma_device *dev);
0307     int (*resume)(struct bcma_device *dev);
0308     void (*shutdown)(struct bcma_device *dev);
0309
0310     struct device_driver drv;
0311 };
0312 extern
0313 int __bcma_driver_register(struct bcma_driver *drv, struct module *owner);
0314 #define bcma_driver_register(drv) \
0315     __bcma_driver_register(drv, THIS_MODULE)
0316
0317 extern void bcma_driver_unregister(struct bcma_driver *drv);
0318
0319 /* module_bcma_driver() - Helper macro for drivers that don't do
0320  * anything special in module init/exit.  This eliminates a lot of
0321  * boilerplate.  Each module may only use this macro once, and
0322  * calling it replaces module_init() and module_exit()
0323  */
0324 #define module_bcma_driver(__bcma_driver) \
0325     module_driver(__bcma_driver, bcma_driver_register, \
0326             bcma_driver_unregister)
0327
0328 /* Set a fallback SPROM.
0329  * See kdoc at the function definition for complete documentation. */
0330 extern int bcma_arch_register_fallback_sprom(
0331         int (*sprom_callback)(struct bcma_bus *bus,
0332         struct ssb_sprom *out));
0333
0334 struct bcma_bus {
0335     struct device *dev;
0336
0337     /* The MMIO area. */
0338     void __iomem *mmio;
0339
0340     const struct bcma_host_ops *ops;
0341
0342     enum bcma_hosttype hosttype;
0343     bool host_is_pcie2; /* Used for BCMA_HOSTTYPE_PCI only */
0344     struct pci_dev *host_pci; /* PCI bus pointer (BCMA_HOSTTYPE_PCI only) */
0345
0346     struct bcma_chipinfo chipinfo;
0347
0348     struct bcma_boardinfo boardinfo;
0349
0350     struct bcma_device *mapped_core;
0351     struct list_head cores;
0352     u8 nr_cores;
0353     u8 num;
0354
0355     struct bcma_drv_cc drv_cc;
0356     struct bcma_drv_cc_b drv_cc_b;
0357     struct bcma_drv_pci drv_pci[2];
0358     struct bcma_drv_pcie2 drv_pcie2;
0359     struct bcma_drv_mips drv_mips;
0360     struct bcma_drv_gmac_cmn drv_gmac_cmn;
0361
0362     /* We decided to share SPROM struct with SSB as long as we do not need
0363      * any hacks for BCMA. This simplifies drivers code. */
0364     struct ssb_sprom sprom;
0365 };
0366
0367 static inline u32 bcma_read8(struct bcma_device *core, u16 offset)
0368 {
0369     return core->bus->ops->read8(core, offset);
0370 }
0371 static inline u32 bcma_read16(struct bcma_device *core, u16 offset)
0372 {
0373     return core->bus->ops->read16(core, offset);
0374 }
0375 static inline u32 bcma_read32(struct bcma_device *core, u16 offset)
0376 {
0377     return core->bus->ops->read32(core, offset);
0378 }
0379 static inline
0380 void bcma_write8(struct bcma_device *core, u16 offset, u32 value)
0381 {
0382     core->bus->ops->write8(core, offset, value);
0383 }
0384 static inline
0385 void bcma_write16(struct bcma_device *core, u16 offset, u32 value)
0386 {
0387     core->bus->ops->write16(core, offset, value);
0388 }
0389 static inline
0390 void bcma_write32(struct bcma_device *core, u16 offset, u32 value)
0391 {
0392     core->bus->ops->write32(core, offset, value);
0393 }
0394 #ifdef CONFIG_BCMA_BLOCKIO
0395 static inline void bcma_block_read(struct bcma_device *core, void *buffer,
0396                    size_t count, u16 offset, u8 reg_width)
0397 {
0398     core->bus->ops->block_read(core, buffer, count, offset, reg_width);
0399 }
0400 static inline void bcma_block_write(struct bcma_device *core,
0401                     const void *buffer, size_t count,
0402                     u16 offset, u8 reg_width)
0403 {
0404     core->bus->ops->block_write(core, buffer, count, offset, reg_width);
0405 }
0406 #endif
0407 static inline u32 bcma_aread32(struct bcma_device *core, u16 offset)
0408 {
0409     return core->bus->ops->aread32(core, offset);
0410 }
0411 static inline
0412 void bcma_awrite32(struct bcma_device *core, u16 offset, u32 value)
0413 {
0414     core->bus->ops->awrite32(core, offset, value);
0415 }
0416
0417 static inline void bcma_mask32(struct bcma_device *cc, u16 offset, u32 mask)
0418 {
0419     bcma_write32(cc, offset, bcma_read32(cc, offset) & mask);
0420 }
0421 static inline void bcma_set32(struct bcma_device *cc, u16 offset, u32 set)
0422 {
0423     bcma_write32(cc, offset, bcma_read32(cc, offset) | set);
0424 }
0425 static inline void bcma_maskset32(struct bcma_device *cc,
0426                   u16 offset, u32 mask, u32 set)
0427 {
0428     bcma_write32(cc, offset, (bcma_read32(cc, offset) & mask) | set);
0429 }
0430 static inline void bcma_mask16(struct bcma_device *cc, u16 offset, u16 mask)
0431 {
0432     bcma_write16(cc, offset, bcma_read16(cc, offset) & mask);
0433 }
0434 static inline void bcma_set16(struct bcma_device *cc, u16 offset, u16 set)
0435 {
0436     bcma_write16(cc, offset, bcma_read16(cc, offset) | set);
0437 }
0438 static inline void bcma_maskset16(struct bcma_device *cc,
0439                   u16 offset, u16 mask, u16 set)
0440 {
0441     bcma_write16(cc, offset, (bcma_read16(cc, offset) & mask) | set);
0442 }
0443
0444 extern struct bcma_device *bcma_find_core_unit(struct bcma_bus *bus, u16 coreid,
0445                            u8 unit);
0446 static inline struct bcma_device *bcma_find_core(struct bcma_bus *bus,
0447                          u16 coreid)
0448 {
0449     return bcma_find_core_unit(bus, coreid, 0);
0450 }
0451
0452 #ifdef CONFIG_BCMA_HOST_PCI
0453 extern void bcma_host_pci_up(struct bcma_bus *bus);
0454 extern void bcma_host_pci_down(struct bcma_bus *bus);
0455 extern int bcma_host_pci_irq_ctl(struct bcma_bus *bus,
0456                  struct bcma_device *core, bool enable);
0457 #else
0458 static inline void bcma_host_pci_up(struct bcma_bus *bus)
0459 {
0460 }
0461 static inline void bcma_host_pci_down(struct bcma_bus *bus)
0462 {
0463 }
0464 static inline int bcma_host_pci_irq_ctl(struct bcma_bus *bus,
0465                     struct bcma_device *core, bool enable)
0466 {
0467     if (bus->hosttype == BCMA_HOSTTYPE_PCI)
0468         return -ENOTSUPP;
0469     return 0;
0470 }
0471 #endif
0472
0473 extern bool bcma_core_is_enabled(struct bcma_device *core);
0474 extern void bcma_core_disable(struct bcma_device *core, u32 flags);
0475 extern int bcma_core_enable(struct bcma_device *core, u32 flags);
0476 extern void bcma_core_set_clockmode(struct bcma_device *core,
0477                     enum bcma_clkmode clkmode);
0478 extern void bcma_core_pll_ctl(struct bcma_device *core, u32 req, u32 status,
0479                   bool on);
0480 extern u32 bcma_chipco_pll_read(struct bcma_drv_cc *cc, u32 offset);
0481 #define BCMA_DMA_TRANSLATION_MASK   0xC0000000
0482 #define  BCMA_DMA_TRANSLATION_NONE  0x00000000
0483 #define  BCMA_DMA_TRANSLATION_DMA32_CMT 0x40000000 /* Client Mode Translation for 32-bit DMA */
0484 #define  BCMA_DMA_TRANSLATION_DMA64_CMT 0x80000000 /* Client Mode Translation for 64-bit DMA */
0485 extern u32 bcma_core_dma_translation(struct bcma_device *core);
0486
0487 extern unsigned int bcma_core_irq(struct bcma_device *core, int num);
0488
0489 #endif /* LINUX_BCMA_H_ */