linux/amba/pl08x.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * linux/amba/pl08x.h - ARM PrimeCell DMA Controller driver
0004  *
0005  * Copyright (C) 2005 ARM Ltd
0006  * Copyright (C) 2010 ST-Ericsson SA
0007  *
0008  * pl08x information required by platform code
0009  *
0010  * Please credit ARM.com
0011  * Documentation: ARM DDI 0196D
0012  */
0013
0014 #ifndef AMBA_PL08X_H
0015 #define AMBA_PL08X_H
0016
0017 /* We need sizes of structs from this header */
0018 #include <linux/dmaengine.h>
0019 #include <linux/interrupt.h>
0020
0021 struct pl08x_driver_data;
0022 struct pl08x_phy_chan;
0023 struct pl08x_txd;
0024
0025 /* Bitmasks for selecting AHB ports for DMA transfers */
0026 enum {
0027     PL08X_AHB1 = (1 << 0),
0028     PL08X_AHB2 = (1 << 1)
0029 };
0030
0031 /**
0032  * struct pl08x_channel_data - data structure to pass info between
0033  * platform and PL08x driver regarding channel configuration
0034  * @bus_id: name of this device channel, not just a device name since
0035  * devices may have more than one channel e.g. "foo_tx"
0036  * @min_signal: the minimum DMA signal number to be muxed in for this
0037  * channel (for platforms supporting muxed signals). If you have
0038  * static assignments, make sure this is set to the assigned signal
0039  * number, PL08x have 16 possible signals in number 0 thru 15 so
0040  * when these are not enough they often get muxed (in hardware)
0041  * disabling simultaneous use of the same channel for two devices.
0042  * @max_signal: the maximum DMA signal number to be muxed in for
0043  * the channel. Set to the same as min_signal for
0044  * devices with static assignments
0045  * @muxval: a number usually used to poke into some mux regiser to
0046  * mux in the signal to this channel
0047  * @addr: source/target address in physical memory for this DMA channel,
0048  * can be the address of a FIFO register for burst requests for example.
0049  * This can be left undefined if the PrimeCell API is used for configuring
0050  * this.
0051  * @single: the device connected to this channel will request single DMA
0052  * transfers, not bursts. (Bursts are default.)
0053  * @periph_buses: the device connected to this channel is accessible via
0054  * these buses (use PL08X_AHB1 | PL08X_AHB2).
0055  */
0056 struct pl08x_channel_data {
0057     const char *bus_id;
0058     int min_signal;
0059     int max_signal;
0060     u32 muxval;
0061     dma_addr_t addr;
0062     bool single;
0063     u8 periph_buses;
0064 };
0065
0066 enum pl08x_burst_size {
0067     PL08X_BURST_SZ_1,
0068     PL08X_BURST_SZ_4,
0069     PL08X_BURST_SZ_8,
0070     PL08X_BURST_SZ_16,
0071     PL08X_BURST_SZ_32,
0072     PL08X_BURST_SZ_64,
0073     PL08X_BURST_SZ_128,
0074     PL08X_BURST_SZ_256,
0075 };
0076
0077 enum pl08x_bus_width {
0078     PL08X_BUS_WIDTH_8_BITS,
0079     PL08X_BUS_WIDTH_16_BITS,
0080     PL08X_BUS_WIDTH_32_BITS,
0081 };
0082
0083 /**
0084  * struct pl08x_platform_data - the platform configuration for the PL08x
0085  * PrimeCells.
0086  * @slave_channels: the channels defined for the different devices on the
0087  * platform, all inclusive, including multiplexed channels. The available
0088  * physical channels will be multiplexed around these signals as they are
0089  * requested, just enumerate all possible channels.
0090  * @num_slave_channels: number of elements in the slave channel array
0091  * @memcpy_burst_size: the appropriate burst size for memcpy operations
0092  * @memcpy_bus_width: memory bus width
0093  * @memcpy_prot_buff: whether memcpy DMA is bufferable
0094  * @memcpy_prot_cache: whether memcpy DMA is cacheable
0095  * @get_xfer_signal: request a physical signal to be used for a DMA transfer
0096  * immediately: if there is some multiplexing or similar blocking the use
0097  * of the channel the transfer can be denied by returning less than zero,
0098  * else it returns the allocated signal number
0099  * @put_xfer_signal: indicate to the platform that this physical signal is not
0100  * running any DMA transfer and multiplexing can be recycled
0101  * @lli_buses: buses which LLIs can be fetched from: PL08X_AHB1 | PL08X_AHB2
0102  * @mem_buses: buses which memory can be accessed from: PL08X_AHB1 | PL08X_AHB2
0103  * @slave_map: DMA slave matching table
0104  * @slave_map_len: number of elements in @slave_map
0105  */
0106 struct pl08x_platform_data {
0107     struct pl08x_channel_data *slave_channels;
0108     unsigned int num_slave_channels;
0109     enum pl08x_burst_size memcpy_burst_size;
0110     enum pl08x_bus_width memcpy_bus_width;
0111     bool memcpy_prot_buff;
0112     bool memcpy_prot_cache;
0113     int (*get_xfer_signal)(const struct pl08x_channel_data *);
0114     void (*put_xfer_signal)(const struct pl08x_channel_data *, int);
0115     u8 lli_buses;
0116     u8 mem_buses;
0117     const struct dma_slave_map *slave_map;
0118     int slave_map_len;
0119 };
0120
0121 #ifdef CONFIG_AMBA_PL08X
0122 bool pl08x_filter_id(struct dma_chan *chan, void *chan_id);
0123 #else
0124 static inline bool pl08x_filter_id(struct dma_chan *chan, void *chan_id)
0125 {
0126     return false;
0127 }
0128 #endif
0129
0130 #endif  /* AMBA_PL08X_H */