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0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  *  linux/include/asm-arm/hardware/amba_kmi.h
0004  *
0005  *  Internal header file for AMBA KMI ports
0006  *
0007  *  Copyright (C) 2000 Deep Blue Solutions Ltd.
0008  *
0009  * ---------------------------------------------------------------------------
0010  *  From ARM PrimeCell(tm) PS2 Keyboard/Mouse Interface (PL050) Technical
0011  *  Reference Manual - ARM DDI 0143B - see http://www.arm.com/
0012  * ---------------------------------------------------------------------------
0013  */
0014 #ifndef ASM_ARM_HARDWARE_AMBA_KMI_H
0015 #define ASM_ARM_HARDWARE_AMBA_KMI_H
0016 
0017 /*
0018  * KMI control register:
0019  *  KMICR_TYPE       0 = PS2/AT mode, 1 = No line control bit mode
0020  *  KMICR_RXINTREN   1 = enable RX interrupts
0021  *  KMICR_TXINTREN   1 = enable TX interrupts
0022  *  KMICR_EN         1 = enable KMI
0023  *  KMICR_FD         1 = force KMI data low
0024  *  KMICR_FC         1 = force KMI clock low
0025  */
0026 #define KMICR       (KMI_BASE + 0x00)
0027 #define KMICR_TYPE      (1 << 5)
0028 #define KMICR_RXINTREN      (1 << 4)
0029 #define KMICR_TXINTREN      (1 << 3)
0030 #define KMICR_EN        (1 << 2)
0031 #define KMICR_FD        (1 << 1)
0032 #define KMICR_FC        (1 << 0)
0033 
0034 /*
0035  * KMI status register:
0036  *  KMISTAT_TXEMPTY  1 = transmitter register empty
0037  *  KMISTAT_TXBUSY   1 = currently sending data
0038  *  KMISTAT_RXFULL   1 = receiver register ready to be read
0039  *  KMISTAT_RXBUSY   1 = currently receiving data
0040  *  KMISTAT_RXPARITY parity of last databyte received
0041  *  KMISTAT_IC       current level of KMI clock input
0042  *  KMISTAT_ID       current level of KMI data input
0043  */
0044 #define KMISTAT     (KMI_BASE + 0x04)
0045 #define KMISTAT_TXEMPTY     (1 << 6)
0046 #define KMISTAT_TXBUSY      (1 << 5)
0047 #define KMISTAT_RXFULL      (1 << 4)
0048 #define KMISTAT_RXBUSY      (1 << 3)
0049 #define KMISTAT_RXPARITY    (1 << 2)
0050 #define KMISTAT_IC      (1 << 1)
0051 #define KMISTAT_ID      (1 << 0)
0052 
0053 /*
0054  * KMI data register
0055  */
0056 #define KMIDATA     (KMI_BASE + 0x08)
0057 
0058 /*
0059  * KMI clock divisor: to generate 8MHz internal clock
0060  *  div = (ref / 8MHz) - 1; 0 <= div <= 15
0061  */
0062 #define KMICLKDIV   (KMI_BASE + 0x0c)
0063 
0064 /*
0065  * KMI interrupt register:
0066  *  KMIIR_TXINTR     1 = transmit interrupt asserted
0067  *  KMIIR_RXINTR     1 = receive interrupt asserted
0068  */
0069 #define KMIIR       (KMI_BASE + 0x10)
0070 #define KMIIR_TXINTR        (1 << 1)
0071 #define KMIIR_RXINTR        (1 << 0)
0072 
0073 /*
0074  * The size of the KMI primecell
0075  */
0076 #define KMI_SIZE    (0x100)
0077 
0078 #endif