dt-bindings/reset/sun50i-h6-ccu.h

0001 // SPDX-License-Identifier: (GPL-2.0+ or MIT)
0002 /*
0003  * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
0004  */
0005
0006 #ifndef _DT_BINDINGS_RESET_SUN50I_H6_H_
0007 #define _DT_BINDINGS_RESET_SUN50I_H6_H_
0008
0009 #define RST_MBUS        0
0010 #define RST_BUS_DE      1
0011 #define RST_BUS_DEINTERLACE 2
0012 #define RST_BUS_GPU     3
0013 #define RST_BUS_CE      4
0014 #define RST_BUS_VE      5
0015 #define RST_BUS_EMCE        6
0016 #define RST_BUS_VP9     7
0017 #define RST_BUS_DMA     8
0018 #define RST_BUS_MSGBOX      9
0019 #define RST_BUS_SPINLOCK    10
0020 #define RST_BUS_HSTIMER     11
0021 #define RST_BUS_DBG     12
0022 #define RST_BUS_PSI     13
0023 #define RST_BUS_PWM     14
0024 #define RST_BUS_IOMMU       15
0025 #define RST_BUS_DRAM        16
0026 #define RST_BUS_NAND        17
0027 #define RST_BUS_MMC0        18
0028 #define RST_BUS_MMC1        19
0029 #define RST_BUS_MMC2        20
0030 #define RST_BUS_UART0       21
0031 #define RST_BUS_UART1       22
0032 #define RST_BUS_UART2       23
0033 #define RST_BUS_UART3       24
0034 #define RST_BUS_I2C0        25
0035 #define RST_BUS_I2C1        26
0036 #define RST_BUS_I2C2        27
0037 #define RST_BUS_I2C3        28
0038 #define RST_BUS_SCR0        29
0039 #define RST_BUS_SCR1        30
0040 #define RST_BUS_SPI0        31
0041 #define RST_BUS_SPI1        32
0042 #define RST_BUS_EMAC        33
0043 #define RST_BUS_TS      34
0044 #define RST_BUS_IR_TX       35
0045 #define RST_BUS_THS     36
0046 #define RST_BUS_I2S0        37
0047 #define RST_BUS_I2S1        38
0048 #define RST_BUS_I2S2        39
0049 #define RST_BUS_I2S3        40
0050 #define RST_BUS_SPDIF       41
0051 #define RST_BUS_DMIC        42
0052 #define RST_BUS_AUDIO_HUB   43
0053 #define RST_USB_PHY0        44
0054 #define RST_USB_PHY1        45
0055 #define RST_USB_PHY3        46
0056 #define RST_USB_HSIC        47
0057 #define RST_BUS_OHCI0       48
0058 #define RST_BUS_OHCI3       49
0059 #define RST_BUS_EHCI0       50
0060 #define RST_BUS_XHCI        51
0061 #define RST_BUS_EHCI3       52
0062 #define RST_BUS_OTG     53
0063 #define RST_BUS_PCIE        54
0064 #define RST_PCIE_POWERUP    55
0065 #define RST_BUS_HDMI        56
0066 #define RST_BUS_HDMI_SUB    57
0067 #define RST_BUS_TCON_TOP    58
0068 #define RST_BUS_TCON_LCD0   59
0069 #define RST_BUS_TCON_TV0    60
0070 #define RST_BUS_CSI     61
0071 #define RST_BUS_HDCP        62
0072
0073 #endif /* _DT_BINDINGS_RESET_SUN50I_H6_H_ */