dt-bindings/reset/stm32mp1-resets.h

0001 /* SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause */
0002 /*
0003  * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
0004  * Author: Gabriel Fernandez <gabriel.fernandez@st.com> for STMicroelectronics.
0005  */
0006
0007 #ifndef _DT_BINDINGS_STM32MP1_RESET_H_
0008 #define _DT_BINDINGS_STM32MP1_RESET_H_
0009
0010 #define MCU_HOLD_BOOT_R 2144
0011 #define LTDC_R      3072
0012 #define DSI_R       3076
0013 #define DDRPERFM_R  3080
0014 #define USBPHY_R    3088
0015 #define SPI6_R      3136
0016 #define I2C4_R      3138
0017 #define I2C6_R      3139
0018 #define USART1_R    3140
0019 #define STGEN_R     3156
0020 #define GPIOZ_R     3200
0021 #define CRYP1_R     3204
0022 #define HASH1_R     3205
0023 #define RNG1_R      3206
0024 #define AXIM_R      3216
0025 #define GPU_R       3269
0026 #define ETHMAC_R    3274
0027 #define FMC_R       3276
0028 #define QSPI_R      3278
0029 #define SDMMC1_R    3280
0030 #define SDMMC2_R    3281
0031 #define CRC1_R      3284
0032 #define USBH_R      3288
0033 #define MDMA_R      3328
0034 #define MCU_R       8225
0035 #define TIM2_R      19456
0036 #define TIM3_R      19457
0037 #define TIM4_R      19458
0038 #define TIM5_R      19459
0039 #define TIM6_R      19460
0040 #define TIM7_R      19461
0041 #define TIM12_R     16462
0042 #define TIM13_R     16463
0043 #define TIM14_R     16464
0044 #define LPTIM1_R    19465
0045 #define SPI2_R      19467
0046 #define SPI3_R      19468
0047 #define USART2_R    19470
0048 #define USART3_R    19471
0049 #define UART4_R     19472
0050 #define UART5_R     19473
0051 #define UART7_R     19474
0052 #define UART8_R     19475
0053 #define I2C1_R      19477
0054 #define I2C2_R      19478
0055 #define I2C3_R      19479
0056 #define I2C5_R      19480
0057 #define SPDIF_R     19482
0058 #define CEC_R       19483
0059 #define DAC12_R     19485
0060 #define MDIO_R      19847
0061 #define TIM1_R      19520
0062 #define TIM8_R      19521
0063 #define TIM15_R     19522
0064 #define TIM16_R     19523
0065 #define TIM17_R     19524
0066 #define SPI1_R      19528
0067 #define SPI4_R      19529
0068 #define SPI5_R      19530
0069 #define USART6_R    19533
0070 #define SAI1_R      19536
0071 #define SAI2_R      19537
0072 #define SAI3_R      19538
0073 #define DFSDM_R     19540
0074 #define FDCAN_R     19544
0075 #define LPTIM2_R    19584
0076 #define LPTIM3_R    19585
0077 #define LPTIM4_R    19586
0078 #define LPTIM5_R    19587
0079 #define SAI4_R      19592
0080 #define SYSCFG_R    19595
0081 #define VREF_R      19597
0082 #define TMPSENS_R   19600
0083 #define PMBCTRL_R   19601
0084 #define DMA1_R      19648
0085 #define DMA2_R      19649
0086 #define DMAMUX_R    19650
0087 #define ADC12_R     19653
0088 #define USBO_R      19656
0089 #define SDMMC3_R    19664
0090 #define CAMITF_R    19712
0091 #define CRYP2_R     19716
0092 #define HASH2_R     19717
0093 #define RNG2_R      19718
0094 #define CRC2_R      19719
0095 #define HSEM_R      19723
0096 #define MBOX_R      19724
0097 #define GPIOA_R     19776
0098 #define GPIOB_R     19777
0099 #define GPIOC_R     19778
0100 #define GPIOD_R     19779
0101 #define GPIOE_R     19780
0102 #define GPIOF_R     19781
0103 #define GPIOG_R     19782
0104 #define GPIOH_R     19783
0105 #define GPIOI_R     19784
0106 #define GPIOJ_R     19785
0107 #define GPIOK_R     19786
0108
0109 /* SCMI reset domain identifiers */
0110 #define RST_SCMI_SPI6       0
0111 #define RST_SCMI_I2C4       1
0112 #define RST_SCMI_I2C6       2
0113 #define RST_SCMI_USART1 3
0114 #define RST_SCMI_STGEN      4
0115 #define RST_SCMI_GPIOZ      5
0116 #define RST_SCMI_CRYP1      6
0117 #define RST_SCMI_HASH1      7
0118 #define RST_SCMI_RNG1       8
0119 #define RST_SCMI_MDMA       9
0120 #define RST_SCMI_MCU        10
0121 #define RST_SCMI_MCU_HOLD_BOOT  11
0122
0123 #endif /* _DT_BINDINGS_STM32MP1_RESET_H_ */