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0001 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
0002 /*
0003  * Copyright (C) 2021 Ahmad Fatoum, Pengutronix
0004  */
0005 
0006 #ifndef __DT_BINDINGS_RESET_STARFIVE_JH7100_H__
0007 #define __DT_BINDINGS_RESET_STARFIVE_JH7100_H__
0008 
0009 #define JH7100_RSTN_DOM3AHB_BUS     0
0010 #define JH7100_RSTN_DOM7AHB_BUS     1
0011 #define JH7100_RST_U74          2
0012 #define JH7100_RSTN_U74_AXI     3
0013 #define JH7100_RSTN_SGDMA2P_AHB     4
0014 #define JH7100_RSTN_SGDMA2P_AXI     5
0015 #define JH7100_RSTN_DMA2PNOC_AXI    6
0016 #define JH7100_RSTN_DLA_AXI     7
0017 #define JH7100_RSTN_DLANOC_AXI      8
0018 #define JH7100_RSTN_DLA_APB     9
0019 #define JH7100_RST_VP6_DRESET       10
0020 #define JH7100_RST_VP6_BRESET       11
0021 #define JH7100_RSTN_VP6_AXI     12
0022 #define JH7100_RSTN_VDECBRG_MAIN    13
0023 #define JH7100_RSTN_VDEC_AXI        14
0024 #define JH7100_RSTN_VDEC_BCLK       15
0025 #define JH7100_RSTN_VDEC_CCLK       16
0026 #define JH7100_RSTN_VDEC_APB        17
0027 #define JH7100_RSTN_JPEG_AXI        18
0028 #define JH7100_RSTN_JPEG_CCLK       19
0029 #define JH7100_RSTN_JPEG_APB        20
0030 #define JH7100_RSTN_JPCGC300_MAIN   21
0031 #define JH7100_RSTN_GC300_2X        22
0032 #define JH7100_RSTN_GC300_AXI       23
0033 #define JH7100_RSTN_GC300_AHB       24
0034 #define JH7100_RSTN_VENC_AXI        25
0035 #define JH7100_RSTN_VENCBRG_MAIN    26
0036 #define JH7100_RSTN_VENC_BCLK       27
0037 #define JH7100_RSTN_VENC_CCLK       28
0038 #define JH7100_RSTN_VENC_APB        29
0039 #define JH7100_RSTN_DDRPHY_APB      30
0040 #define JH7100_RSTN_NOC_ROB     31
0041 #define JH7100_RSTN_NOC_COG     32
0042 #define JH7100_RSTN_HIFI4_AXI       33
0043 #define JH7100_RSTN_HIFI4NOC_AXI    34
0044 #define JH7100_RST_HIFI4_DRESET     35
0045 #define JH7100_RST_HIFI4_BRESET     36
0046 #define JH7100_RSTN_USB_AXI     37
0047 #define JH7100_RSTN_USBNOC_AXI      38
0048 #define JH7100_RSTN_SGDMA1P_AXI     39
0049 #define JH7100_RSTN_DMA1P_AXI       40
0050 #define JH7100_RSTN_X2C_AXI     41
0051 #define JH7100_RSTN_NNE_AHB     42
0052 #define JH7100_RSTN_NNE_AXI     43
0053 #define JH7100_RSTN_NNENOC_AXI      44
0054 #define JH7100_RSTN_DLASLV_AXI      45
0055 #define JH7100_RSTN_DSPX2C_AXI      46
0056 #define JH7100_RSTN_VIN_SRC     47
0057 #define JH7100_RSTN_ISPSLV_AXI      48
0058 #define JH7100_RSTN_VIN_AXI     49
0059 #define JH7100_RSTN_VINNOC_AXI      50
0060 #define JH7100_RSTN_ISP0_AXI        51
0061 #define JH7100_RSTN_ISP0NOC_AXI     52
0062 #define JH7100_RSTN_ISP1_AXI        53
0063 #define JH7100_RSTN_ISP1NOC_AXI     54
0064 #define JH7100_RSTN_VOUT_SRC        55
0065 #define JH7100_RSTN_DISP_AXI        56
0066 #define JH7100_RSTN_DISPNOC_AXI     57
0067 #define JH7100_RSTN_SDIO0_AHB       58
0068 #define JH7100_RSTN_SDIO1_AHB       59
0069 #define JH7100_RSTN_GMAC_AHB        60
0070 #define JH7100_RSTN_SPI2AHB_AHB     61
0071 #define JH7100_RSTN_SPI2AHB_CORE    62
0072 #define JH7100_RSTN_EZMASTER_AHB    63
0073 #define JH7100_RST_E24          64
0074 #define JH7100_RSTN_QSPI_AHB        65
0075 #define JH7100_RSTN_QSPI_CORE       66
0076 #define JH7100_RSTN_QSPI_APB        67
0077 #define JH7100_RSTN_SEC_AHB     68
0078 #define JH7100_RSTN_AES         69
0079 #define JH7100_RSTN_PKA         70
0080 #define JH7100_RSTN_SHA         71
0081 #define JH7100_RSTN_TRNG_APB        72
0082 #define JH7100_RSTN_OTP_APB     73
0083 #define JH7100_RSTN_UART0_APB       74
0084 #define JH7100_RSTN_UART0_CORE      75
0085 #define JH7100_RSTN_UART1_APB       76
0086 #define JH7100_RSTN_UART1_CORE      77
0087 #define JH7100_RSTN_SPI0_APB        78
0088 #define JH7100_RSTN_SPI0_CORE       79
0089 #define JH7100_RSTN_SPI1_APB        80
0090 #define JH7100_RSTN_SPI1_CORE       81
0091 #define JH7100_RSTN_I2C0_APB        82
0092 #define JH7100_RSTN_I2C0_CORE       83
0093 #define JH7100_RSTN_I2C1_APB        84
0094 #define JH7100_RSTN_I2C1_CORE       85
0095 #define JH7100_RSTN_GPIO_APB        86
0096 #define JH7100_RSTN_UART2_APB       87
0097 #define JH7100_RSTN_UART2_CORE      88
0098 #define JH7100_RSTN_UART3_APB       89
0099 #define JH7100_RSTN_UART3_CORE      90
0100 #define JH7100_RSTN_SPI2_APB        91
0101 #define JH7100_RSTN_SPI2_CORE       92
0102 #define JH7100_RSTN_SPI3_APB        93
0103 #define JH7100_RSTN_SPI3_CORE       94
0104 #define JH7100_RSTN_I2C2_APB        95
0105 #define JH7100_RSTN_I2C2_CORE       96
0106 #define JH7100_RSTN_I2C3_APB        97
0107 #define JH7100_RSTN_I2C3_CORE       98
0108 #define JH7100_RSTN_WDTIMER_APB     99
0109 #define JH7100_RSTN_WDT         100
0110 #define JH7100_RSTN_TIMER0      101
0111 #define JH7100_RSTN_TIMER1      102
0112 #define JH7100_RSTN_TIMER2      103
0113 #define JH7100_RSTN_TIMER3      104
0114 #define JH7100_RSTN_TIMER4      105
0115 #define JH7100_RSTN_TIMER5      106
0116 #define JH7100_RSTN_TIMER6      107
0117 #define JH7100_RSTN_VP6INTC_APB     108
0118 #define JH7100_RSTN_PWM_APB     109
0119 #define JH7100_RSTN_MSI_APB     110
0120 #define JH7100_RSTN_TEMP_APB        111
0121 #define JH7100_RSTN_TEMP_SENSE      112
0122 #define JH7100_RSTN_SYSERR_APB      113
0123 
0124 #define JH7100_RSTN_END         114
0125 
0126 #endif /* __DT_BINDINGS_RESET_STARFIVE_JH7100_H__ */