dt-bindings/reset/realtek%2Crtd1195.h

0001 /* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */
0002 /*
0003  * Realtek RTD1195 reset controllers
0004  *
0005  * Copyright (c) 2017 Andreas Färber
0006  */
0007 #ifndef DT_BINDINGS_RESET_RTD1195_H
0008 #define DT_BINDINGS_RESET_RTD1195_H
0009
0010 /* soft reset 1 */
0011 #define RTD1195_RSTN_MISC       0
0012 #define RTD1195_RSTN_RNG        1
0013 #define RTD1195_RSTN_USB3_POW       2
0014 #define RTD1195_RSTN_GSPI       3
0015 #define RTD1195_RSTN_USB3_P0_MDIO   4
0016 #define RTD1195_RSTN_VE_H265        5
0017 #define RTD1195_RSTN_USB        6
0018 #define RTD1195_RSTN_USB_PHY0       8
0019 #define RTD1195_RSTN_USB_PHY1       9
0020 #define RTD1195_RSTN_HDMIRX     11
0021 #define RTD1195_RSTN_HDMI       12
0022 #define RTD1195_RSTN_ETN        14
0023 #define RTD1195_RSTN_AIO        15
0024 #define RTD1195_RSTN_GPU        16
0025 #define RTD1195_RSTN_VE_H264        17
0026 #define RTD1195_RSTN_VE_JPEG        18
0027 #define RTD1195_RSTN_TVE        19
0028 #define RTD1195_RSTN_VO         20
0029 #define RTD1195_RSTN_LVDS       21
0030 #define RTD1195_RSTN_SE         22
0031 #define RTD1195_RSTN_DCU        23
0032 #define RTD1195_RSTN_DC_PHY     24
0033 #define RTD1195_RSTN_CP         25
0034 #define RTD1195_RSTN_MD         26
0035 #define RTD1195_RSTN_TP         27
0036 #define RTD1195_RSTN_AE         28
0037 #define RTD1195_RSTN_NF         29
0038 #define RTD1195_RSTN_MIPI       30
0039
0040 /* soft reset 2 */
0041 #define RTD1195_RSTN_ACPU       0
0042 #define RTD1195_RSTN_VCPU       1
0043 #define RTD1195_RSTN_PCR        9
0044 #define RTD1195_RSTN_CR         10
0045 #define RTD1195_RSTN_EMMC       11
0046 #define RTD1195_RSTN_SDIO       12
0047 #define RTD1195_RSTN_I2C_5      18
0048 #define RTD1195_RSTN_RTC        20
0049 #define RTD1195_RSTN_I2C_4      23
0050 #define RTD1195_RSTN_I2C_3      24
0051 #define RTD1195_RSTN_I2C_2      25
0052 #define RTD1195_RSTN_I2C_1      26
0053 #define RTD1195_RSTN_UR1        28
0054
0055 /* soft reset 3 */
0056 #define RTD1195_RSTN_SB2        0
0057
0058 /* iso soft reset */
0059 #define RTD1195_ISO_RSTN_VFD        0
0060 #define RTD1195_ISO_RSTN_IR     1
0061 #define RTD1195_ISO_RSTN_CEC0       2
0062 #define RTD1195_ISO_RSTN_CEC1       3
0063 #define RTD1195_ISO_RSTN_DP     4
0064 #define RTD1195_ISO_RSTN_CBUSTX     5
0065 #define RTD1195_ISO_RSTN_CBUSRX     6
0066 #define RTD1195_ISO_RSTN_EFUSE      7
0067 #define RTD1195_ISO_RSTN_UR0        8
0068 #define RTD1195_ISO_RSTN_GMAC       9
0069 #define RTD1195_ISO_RSTN_GPHY       10
0070 #define RTD1195_ISO_RSTN_I2C_0      11
0071 #define RTD1195_ISO_RSTN_I2C_6      12
0072 #define RTD1195_ISO_RSTN_CBUS       13
0073
0074 #endif