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0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (c) 2013, The Linux Foundation. All rights reserved.
0004  * Copyright (c) BayLibre, SAS.
0005  * Author : Neil Armstrong <narmstrong@baylibre.com>
0006  */
0007 
0008 #ifndef _DT_BINDINGS_RESET_GCC_MDM9615_H
0009 #define _DT_BINDINGS_RESET_GCC_MDM9615_H
0010 
0011 #define SFAB_MSS_Q6_SW_RESET                0
0012 #define SFAB_MSS_Q6_FW_RESET                1
0013 #define QDSS_STM_RESET                  2
0014 #define AFAB_SMPSS_S_RESET              3
0015 #define AFAB_SMPSS_M1_RESET             4
0016 #define AFAB_SMPSS_M0_RESET             5
0017 #define AFAB_EBI1_CH0_RESET             6
0018 #define AFAB_EBI1_CH1_RESET             7
0019 #define SFAB_ADM0_M0_RESET              8
0020 #define SFAB_ADM0_M1_RESET              9
0021 #define SFAB_ADM0_M2_RESET              10
0022 #define ADM0_C2_RESET                   11
0023 #define ADM0_C1_RESET                   12
0024 #define ADM0_C0_RESET                   13
0025 #define ADM0_PBUS_RESET                 14
0026 #define ADM0_RESET                  15
0027 #define QDSS_CLKS_SW_RESET              16
0028 #define QDSS_POR_RESET                  17
0029 #define QDSS_TSCTR_RESET                18
0030 #define QDSS_HRESET_RESET               19
0031 #define QDSS_AXI_RESET                  20
0032 #define QDSS_DBG_RESET                  21
0033 #define PCIE_A_RESET                    22
0034 #define PCIE_AUX_RESET                  23
0035 #define PCIE_H_RESET                    24
0036 #define SFAB_PCIE_M_RESET               25
0037 #define SFAB_PCIE_S_RESET               26
0038 #define SFAB_MSS_M_RESET                27
0039 #define SFAB_USB3_M_RESET               28
0040 #define SFAB_RIVA_M_RESET               29
0041 #define SFAB_LPASS_RESET                30
0042 #define SFAB_AFAB_M_RESET               31
0043 #define AFAB_SFAB_M0_RESET              32
0044 #define AFAB_SFAB_M1_RESET              33
0045 #define SFAB_SATA_S_RESET               34
0046 #define SFAB_DFAB_M_RESET               35
0047 #define DFAB_SFAB_M_RESET               36
0048 #define DFAB_SWAY0_RESET                37
0049 #define DFAB_SWAY1_RESET                38
0050 #define DFAB_ARB0_RESET                 39
0051 #define DFAB_ARB1_RESET                 40
0052 #define PPSS_PROC_RESET                 41
0053 #define PPSS_RESET                  42
0054 #define DMA_BAM_RESET                   43
0055 #define SPS_TIC_H_RESET                 44
0056 #define SLIMBUS_H_RESET                 45
0057 #define SFAB_CFPB_M_RESET               46
0058 #define SFAB_CFPB_S_RESET               47
0059 #define TSIF_H_RESET                    48
0060 #define CE1_H_RESET                 49
0061 #define CE1_CORE_RESET                  50
0062 #define CE1_SLEEP_RESET                 51
0063 #define CE2_H_RESET                 52
0064 #define CE2_CORE_RESET                  53
0065 #define SFAB_SFPB_M_RESET               54
0066 #define SFAB_SFPB_S_RESET               55
0067 #define RPM_PROC_RESET                  56
0068 #define PMIC_SSBI2_RESET                57
0069 #define SDC1_RESET                  58
0070 #define SDC2_RESET                  59
0071 #define SDC3_RESET                  60
0072 #define SDC4_RESET                  61
0073 #define SDC5_RESET                  62
0074 #define DFAB_A2_RESET                   63
0075 #define USB_HS1_RESET                   64
0076 #define USB_HSIC_RESET                  65
0077 #define USB_FS1_XCVR_RESET              66
0078 #define USB_FS1_RESET                   67
0079 #define USB_FS2_XCVR_RESET              68
0080 #define USB_FS2_RESET                   69
0081 #define GSBI1_RESET                 70
0082 #define GSBI2_RESET                 71
0083 #define GSBI3_RESET                 72
0084 #define GSBI4_RESET                 73
0085 #define GSBI5_RESET                 74
0086 #define GSBI6_RESET                 75
0087 #define GSBI7_RESET                 76
0088 #define GSBI8_RESET                 77
0089 #define GSBI9_RESET                 78
0090 #define GSBI10_RESET                    79
0091 #define GSBI11_RESET                    80
0092 #define GSBI12_RESET                    81
0093 #define SPDM_RESET                  82
0094 #define TLMM_H_RESET                    83
0095 #define SFAB_MSS_S_RESET                84
0096 #define MSS_SLP_RESET                   85
0097 #define MSS_Q6SW_JTAG_RESET             86
0098 #define MSS_Q6FW_JTAG_RESET             87
0099 #define MSS_RESET                   88
0100 #define SATA_H_RESET                    89
0101 #define SATA_RXOOB_RESE                 90
0102 #define SATA_PMALIVE_RESET              91
0103 #define SATA_SFAB_M_RESET               92
0104 #define TSSC_RESET                  93
0105 #define PDM_RESET                   94
0106 #define MPM_H_RESET                 95
0107 #define MPM_RESET                   96
0108 #define SFAB_SMPSS_S_RESET              97
0109 #define PRNG_RESET                  98
0110 #define RIVA_RESET                  99
0111 #define USB_HS3_RESET                   100
0112 #define USB_HS4_RESET                   101
0113 #define CE3_RESET                   102
0114 #define PCIE_EXT_PCI_RESET              103
0115 #define PCIE_PHY_RESET                  104
0116 #define PCIE_PCI_RESET                  105
0117 #define PCIE_POR_RESET                  106
0118 #define PCIE_HCLK_RESET                 107
0119 #define PCIE_ACLK_RESET                 108
0120 #define CE3_H_RESET                 109
0121 #define SFAB_CE3_M_RESET                110
0122 #define SFAB_CE3_S_RESET                111
0123 #define SATA_RESET                  112
0124 #define CE3_SLEEP_RESET                 113
0125 #define GSS_SLP_RESET                   114
0126 #define GSS_RESET                   115
0127 
0128 #endif