dt-bindings/reset/altr%2Crst-mgr.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (c) 2014, Steffen Trumtrar <s.trumtrar@pengutronix.de>
0004  */
0005
0006 #ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_H
0007 #define _DT_BINDINGS_RESET_ALTR_RST_MGR_H
0008
0009 /* MPUMODRST */
0010 #define CPU0_RESET      0
0011 #define CPU1_RESET      1
0012 #define WDS_RESET       2
0013 #define SCUPER_RESET        3
0014 #define L2_RESET        4
0015
0016 /* PERMODRST */
0017 #define EMAC0_RESET     32
0018 #define EMAC1_RESET     33
0019 #define USB0_RESET      34
0020 #define USB1_RESET      35
0021 #define NAND_RESET      36
0022 #define QSPI_RESET      37
0023 #define L4WD0_RESET     38
0024 #define L4WD1_RESET     39
0025 #define OSC1TIMER0_RESET    40
0026 #define OSC1TIMER1_RESET    41
0027 #define SPTIMER0_RESET      42
0028 #define SPTIMER1_RESET      43
0029 #define I2C0_RESET      44
0030 #define I2C1_RESET      45
0031 #define I2C2_RESET      46
0032 #define I2C3_RESET      47
0033 #define UART0_RESET     48
0034 #define UART1_RESET     49
0035 #define SPIM0_RESET     50
0036 #define SPIM1_RESET     51
0037 #define SPIS0_RESET     52
0038 #define SPIS1_RESET     53
0039 #define SDMMC_RESET     54
0040 #define CAN0_RESET      55
0041 #define CAN1_RESET      56
0042 #define GPIO0_RESET     57
0043 #define GPIO1_RESET     58
0044 #define GPIO2_RESET     59
0045 #define DMA_RESET       60
0046 #define SDR_RESET       61
0047
0048 /* PER2MODRST */
0049 #define DMAIF0_RESET        64
0050 #define DMAIF1_RESET        65
0051 #define DMAIF2_RESET        66
0052 #define DMAIF3_RESET        67
0053 #define DMAIF4_RESET        68
0054 #define DMAIF5_RESET        69
0055 #define DMAIF6_RESET        70
0056 #define DMAIF7_RESET        71
0057
0058 /* BRGMODRST */
0059 #define HPS2FPGA_RESET      96
0060 #define LWHPS2FPGA_RESET    97
0061 #define FPGA2HPS_RESET      98
0062
0063 /* MISCMODRST*/
0064 #define ROM_RESET       128
0065 #define OCRAM_RESET     129
0066 #define SYSMGR_RESET        130
0067 #define SYSMGRCOLD_RESET    131
0068 #define FPGAMGR_RESET       132
0069 #define ACPIDMAP_RESET      133
0070 #define S2F_RESET       134
0071 #define S2FCOLD_RESET       135
0072 #define NRSTPIN_RESET       136
0073 #define TIMESTAMPCOLD_RESET 137
0074 #define CLKMGRCOLD_RESET    138
0075 #define SCANMGR_RESET       139
0076 #define FRZCTRLCOLD_RESET   140
0077 #define SYSDBG_RESET        141
0078 #define DBG_RESET       142
0079 #define TAPCOLD_RESET       143
0080 #define SDRCOLD_RESET       144
0081
0082 #endif