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0001 /* SPDX-License-Identifier: GPL-2.0-only */ 0002 /* 0003 * Copyright Intel Corporation (C) 2017. All Rights Reserved 0004 * 0005 * Reset binding definitions for Altera Arria10 MAX5 System Resource Chip 0006 * 0007 * Adapted from altr,rst-mgr-a10.h 0008 */ 0009 0010 #ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_A10SR_H 0011 #define _DT_BINDINGS_RESET_ALTR_RST_MGR_A10SR_H 0012 0013 /* Peripheral PHY resets */ 0014 #define A10SR_RESET_ENET_HPS 0 0015 #define A10SR_RESET_PCIE 1 0016 #define A10SR_RESET_FILE 2 0017 #define A10SR_RESET_BQSPI 3 0018 #define A10SR_RESET_USB 4 0019 0020 #define A10SR_RESET_NUM 5 0021 0022 #endif
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