Back to home page

OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  *  Copyright (C) 2018 Xilinx, Inc.
0004  */
0005 
0006 #ifndef _DT_BINDINGS_ZYNQMP_POWER_H
0007 #define _DT_BINDINGS_ZYNQMP_POWER_H
0008 
0009 #define     PD_USB_0    22
0010 #define     PD_USB_1    23
0011 #define     PD_TTC_0    24
0012 #define     PD_TTC_1    25
0013 #define     PD_TTC_2    26
0014 #define     PD_TTC_3    27
0015 #define     PD_SATA     28
0016 #define     PD_ETH_0    29
0017 #define     PD_ETH_1    30
0018 #define     PD_ETH_2    31
0019 #define     PD_ETH_3    32
0020 #define     PD_UART_0   33
0021 #define     PD_UART_1   34
0022 #define     PD_SPI_0    35
0023 #define     PD_SPI_1    36
0024 #define     PD_I2C_0    37
0025 #define     PD_I2C_1    38
0026 #define     PD_SD_0     39
0027 #define     PD_SD_1     40
0028 #define     PD_DP       41
0029 #define     PD_GDMA     42
0030 #define     PD_ADMA     43
0031 #define     PD_NAND     44
0032 #define     PD_QSPI     45
0033 #define     PD_GPIO     46
0034 #define     PD_CAN_0    47
0035 #define     PD_CAN_1    48
0036 #define     PD_GPU      58
0037 #define     PD_PCIE     59
0038 
0039 #endif