dt-bindings/power/tegra186-powergate.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (c) 2015-2016, NVIDIA CORPORATION.  All rights reserved.
0004  */
0005
0006 #ifndef _DT_BINDINGS_POWER_TEGRA186_POWERGATE_H
0007 #define _DT_BINDINGS_POWER_TEGRA186_POWERGATE_H
0008
0009 #define TEGRA186_POWER_DOMAIN_AUD   0
0010 #define TEGRA186_POWER_DOMAIN_DFD   1
0011 #define TEGRA186_POWER_DOMAIN_DISP  2
0012 #define TEGRA186_POWER_DOMAIN_DISPB 3
0013 #define TEGRA186_POWER_DOMAIN_DISPC 4
0014 #define TEGRA186_POWER_DOMAIN_ISPA  5
0015 #define TEGRA186_POWER_DOMAIN_NVDEC 6
0016 #define TEGRA186_POWER_DOMAIN_NVJPG 7
0017 #define TEGRA186_POWER_DOMAIN_MPE   8
0018 #define TEGRA186_POWER_DOMAIN_PCX   9
0019 #define TEGRA186_POWER_DOMAIN_SAX   10
0020 #define TEGRA186_POWER_DOMAIN_VE    11
0021 #define TEGRA186_POWER_DOMAIN_VIC   12
0022 #define TEGRA186_POWER_DOMAIN_XUSBA 13
0023 #define TEGRA186_POWER_DOMAIN_XUSBB 14
0024 #define TEGRA186_POWER_DOMAIN_XUSBC 15
0025 #define TEGRA186_POWER_DOMAIN_GPU   43
0026 #define TEGRA186_POWER_DOMAIN_MAX   44
0027
0028 #endif