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0001 /* SPDX-License-Identifier: GPL-2.0 */ 0002 /* 0003 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org> 0004 * Copyright (C) 2016 Glider bvba 0005 */ 0006 0007 #ifndef __DT_BINDINGS_POWER_R8A77965_SYSC_H__ 0008 #define __DT_BINDINGS_POWER_R8A77965_SYSC_H__ 0009 0010 /* 0011 * These power domain indices match the numbers of the interrupt bits 0012 * representing the power areas in the various Interrupt Registers 0013 * (e.g. SYSCISR, Interrupt Status Register) 0014 */ 0015 0016 #define R8A77965_PD_CA57_CPU0 0 0017 #define R8A77965_PD_CA57_CPU1 1 0018 #define R8A77965_PD_A3VP 9 0019 #define R8A77965_PD_CA57_SCU 12 0020 #define R8A77965_PD_CR7 13 0021 #define R8A77965_PD_A3VC 14 0022 #define R8A77965_PD_3DG_A 17 0023 #define R8A77965_PD_3DG_B 18 0024 #define R8A77965_PD_A2VC1 26 0025 0026 /* Always-on power area */ 0027 #define R8A77965_PD_ALWAYS_ON 32 0028 0029 #endif /* __DT_BINDINGS_POWER_R8A77965_SYSC_H__ */
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