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OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (C) 2016 Glider bvba
0004  */
0005 #ifndef __DT_BINDINGS_POWER_R8A7790_SYSC_H__
0006 #define __DT_BINDINGS_POWER_R8A7790_SYSC_H__
0007 
0008 /*
0009  * These power domain indices match the numbers of the interrupt bits
0010  * representing the power areas in the various Interrupt Registers
0011  * (e.g. SYSCISR, Interrupt Status Register)
0012  */
0013 
0014 #define R8A7790_PD_CA15_CPU0         0
0015 #define R8A7790_PD_CA15_CPU1         1
0016 #define R8A7790_PD_CA15_CPU2         2
0017 #define R8A7790_PD_CA15_CPU3         3
0018 #define R8A7790_PD_CA7_CPU0      5
0019 #define R8A7790_PD_CA7_CPU1      6
0020 #define R8A7790_PD_CA7_CPU2      7
0021 #define R8A7790_PD_CA7_CPU3      8
0022 #define R8A7790_PD_CA15_SCU     12
0023 #define R8A7790_PD_SH_4A        16
0024 #define R8A7790_PD_RGX          20
0025 #define R8A7790_PD_CA7_SCU      21
0026 #define R8A7790_PD_IMP          24
0027 
0028 /* Always-on power area */
0029 #define R8A7790_PD_ALWAYS_ON        32
0030 
0031 #endif /* __DT_BINDINGS_POWER_R8A7790_SYSC_H__ */