dt-bindings/power/r8a774e1-sysc.h

0001 /* SPDX-License-Identifier: GPL-2.0
0002  *
0003  * Copyright (C) 2020 Renesas Electronics Corp.
0004  */
0005 #ifndef __DT_BINDINGS_POWER_R8A774E1_SYSC_H__
0006 #define __DT_BINDINGS_POWER_R8A774E1_SYSC_H__
0007
0008 /*
0009  * These power domain indices match the numbers of the interrupt bits
0010  * representing the power areas in the various Interrupt Registers
0011  * (e.g. SYSCISR, Interrupt Status Register)
0012  */
0013
0014 #define R8A774E1_PD_CA57_CPU0        0
0015 #define R8A774E1_PD_CA57_CPU1        1
0016 #define R8A774E1_PD_CA57_CPU2        2
0017 #define R8A774E1_PD_CA57_CPU3        3
0018 #define R8A774E1_PD_CA53_CPU0        5
0019 #define R8A774E1_PD_CA53_CPU1        6
0020 #define R8A774E1_PD_CA53_CPU2        7
0021 #define R8A774E1_PD_CA53_CPU3        8
0022 #define R8A774E1_PD_A3VP         9
0023 #define R8A774E1_PD_CA57_SCU        12
0024 #define R8A774E1_PD_A3VC        14
0025 #define R8A774E1_PD_3DG_A       17
0026 #define R8A774E1_PD_3DG_B       18
0027 #define R8A774E1_PD_3DG_C       19
0028 #define R8A774E1_PD_3DG_D       20
0029 #define R8A774E1_PD_CA53_SCU        21
0030 #define R8A774E1_PD_3DG_E       22
0031 #define R8A774E1_PD_A2VC1       26
0032
0033 /* Always-on power area */
0034 #define R8A774E1_PD_ALWAYS_ON       32
0035
0036 #endif /* __DT_BINDINGS_POWER_R8A774E1_SYSC_H__ */