dt-bindings/mfd/stm32f4-rcc.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * This header provides constants for the STM32F4 RCC IP
0004  */
0005
0006 #ifndef _DT_BINDINGS_MFD_STM32F4_RCC_H
0007 #define _DT_BINDINGS_MFD_STM32F4_RCC_H
0008
0009 /* AHB1 */
0010 #define STM32F4_RCC_AHB1_GPIOA  0
0011 #define STM32F4_RCC_AHB1_GPIOB  1
0012 #define STM32F4_RCC_AHB1_GPIOC  2
0013 #define STM32F4_RCC_AHB1_GPIOD  3
0014 #define STM32F4_RCC_AHB1_GPIOE  4
0015 #define STM32F4_RCC_AHB1_GPIOF  5
0016 #define STM32F4_RCC_AHB1_GPIOG  6
0017 #define STM32F4_RCC_AHB1_GPIOH  7
0018 #define STM32F4_RCC_AHB1_GPIOI  8
0019 #define STM32F4_RCC_AHB1_GPIOJ  9
0020 #define STM32F4_RCC_AHB1_GPIOK  10
0021 #define STM32F4_RCC_AHB1_CRC    12
0022 #define STM32F4_RCC_AHB1_BKPSRAM    18
0023 #define STM32F4_RCC_AHB1_CCMDATARAM 20
0024 #define STM32F4_RCC_AHB1_DMA1   21
0025 #define STM32F4_RCC_AHB1_DMA2   22
0026 #define STM32F4_RCC_AHB1_DMA2D  23
0027 #define STM32F4_RCC_AHB1_ETHMAC 25
0028 #define STM32F4_RCC_AHB1_ETHMACTX   26
0029 #define STM32F4_RCC_AHB1_ETHMACRX   27
0030 #define STM32F4_RCC_AHB1_ETHMACPTP  28
0031 #define STM32F4_RCC_AHB1_OTGHS      29
0032 #define STM32F4_RCC_AHB1_OTGHSULPI  30
0033
0034 #define STM32F4_AHB1_RESET(bit) (STM32F4_RCC_AHB1_##bit + (0x10 * 8))
0035 #define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit)
0036
0037
0038 /* AHB2 */
0039 #define STM32F4_RCC_AHB2_DCMI   0
0040 #define STM32F4_RCC_AHB2_CRYP   4
0041 #define STM32F4_RCC_AHB2_HASH   5
0042 #define STM32F4_RCC_AHB2_RNG    6
0043 #define STM32F4_RCC_AHB2_OTGFS  7
0044
0045 #define STM32F4_AHB2_RESET(bit) (STM32F4_RCC_AHB2_##bit + (0x14 * 8))
0046 #define STM32F4_AHB2_CLOCK(bit) (STM32F4_RCC_AHB2_##bit + 0x20)
0047
0048 /* AHB3 */
0049 #define STM32F4_RCC_AHB3_FMC    0
0050 #define STM32F4_RCC_AHB3_QSPI   1
0051
0052 #define STM32F4_AHB3_RESET(bit) (STM32F4_RCC_AHB3_##bit + (0x18 * 8))
0053 #define STM32F4_AHB3_CLOCK(bit) (STM32F4_RCC_AHB3_##bit + 0x40)
0054
0055 /* APB1 */
0056 #define STM32F4_RCC_APB1_TIM2   0
0057 #define STM32F4_RCC_APB1_TIM3   1
0058 #define STM32F4_RCC_APB1_TIM4   2
0059 #define STM32F4_RCC_APB1_TIM5   3
0060 #define STM32F4_RCC_APB1_TIM6   4
0061 #define STM32F4_RCC_APB1_TIM7   5
0062 #define STM32F4_RCC_APB1_TIM12  6
0063 #define STM32F4_RCC_APB1_TIM13  7
0064 #define STM32F4_RCC_APB1_TIM14  8
0065 #define STM32F4_RCC_APB1_WWDG   11
0066 #define STM32F4_RCC_APB1_SPI2   14
0067 #define STM32F4_RCC_APB1_SPI3   15
0068 #define STM32F4_RCC_APB1_UART2  17
0069 #define STM32F4_RCC_APB1_UART3  18
0070 #define STM32F4_RCC_APB1_UART4  19
0071 #define STM32F4_RCC_APB1_UART5  20
0072 #define STM32F4_RCC_APB1_I2C1   21
0073 #define STM32F4_RCC_APB1_I2C2   22
0074 #define STM32F4_RCC_APB1_I2C3   23
0075 #define STM32F4_RCC_APB1_CAN1   25
0076 #define STM32F4_RCC_APB1_CAN2   26
0077 #define STM32F4_RCC_APB1_PWR    28
0078 #define STM32F4_RCC_APB1_DAC    29
0079 #define STM32F4_RCC_APB1_UART7  30
0080 #define STM32F4_RCC_APB1_UART8  31
0081
0082 #define STM32F4_APB1_RESET(bit) (STM32F4_RCC_APB1_##bit + (0x20 * 8))
0083 #define STM32F4_APB1_CLOCK(bit) (STM32F4_RCC_APB1_##bit + 0x80)
0084
0085 /* APB2 */
0086 #define STM32F4_RCC_APB2_TIM1   0
0087 #define STM32F4_RCC_APB2_TIM8   1
0088 #define STM32F4_RCC_APB2_USART1 4
0089 #define STM32F4_RCC_APB2_USART6 5
0090 #define STM32F4_RCC_APB2_ADC1   8
0091 #define STM32F4_RCC_APB2_ADC2   9
0092 #define STM32F4_RCC_APB2_ADC3   10
0093 #define STM32F4_RCC_APB2_SDIO   11
0094 #define STM32F4_RCC_APB2_SPI1   12
0095 #define STM32F4_RCC_APB2_SPI4   13
0096 #define STM32F4_RCC_APB2_SYSCFG 14
0097 #define STM32F4_RCC_APB2_TIM9   16
0098 #define STM32F4_RCC_APB2_TIM10  17
0099 #define STM32F4_RCC_APB2_TIM11  18
0100 #define STM32F4_RCC_APB2_SPI5   20
0101 #define STM32F4_RCC_APB2_SPI6   21
0102 #define STM32F4_RCC_APB2_SAI1   22
0103 #define STM32F4_RCC_APB2_LTDC   26
0104 #define STM32F4_RCC_APB2_DSI    27
0105
0106 #define STM32F4_APB2_RESET(bit) (STM32F4_RCC_APB2_##bit + (0x24 * 8))
0107 #define STM32F4_APB2_CLOCK(bit) (STM32F4_RCC_APB2_##bit + 0xA0)
0108
0109 #endif /* _DT_BINDINGS_MFD_STM32F4_RCC_H */