dt-bindings/mfd/as3722.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * This header provides macros for ams AS3722 device bindings.
0004  *
0005  * Copyright (c) 2013, NVIDIA Corporation.
0006  *
0007  * Author: Laxman Dewangan <ldewangan@nvidia.com>
0008  *
0009  */
0010
0011 #ifndef __DT_BINDINGS_AS3722_H__
0012 #define __DT_BINDINGS_AS3722_H__
0013
0014 /* External control pins */
0015 #define AS3722_EXT_CONTROL_PIN_ENABLE1 1
0016 #define AS3722_EXT_CONTROL_PIN_ENABLE2 2
0017 #define AS3722_EXT_CONTROL_PIN_ENABLE3 3
0018
0019 /* Interrupt numbers for AS3722 */
0020 #define AS3722_IRQ_LID          0
0021 #define AS3722_IRQ_ACOK         1
0022 #define AS3722_IRQ_ENABLE1      2
0023 #define AS3722_IRQ_OCCUR_ALARM_SD0  3
0024 #define AS3722_IRQ_ONKEY_LONG_PRESS 4
0025 #define AS3722_IRQ_ONKEY        5
0026 #define AS3722_IRQ_OVTMP        6
0027 #define AS3722_IRQ_LOWBAT       7
0028 #define AS3722_IRQ_SD0_LV       8
0029 #define AS3722_IRQ_SD1_LV       9
0030 #define AS3722_IRQ_SD2_LV       10
0031 #define AS3722_IRQ_PWM1_OV_PROT     11
0032 #define AS3722_IRQ_PWM2_OV_PROT     12
0033 #define AS3722_IRQ_ENABLE2      13
0034 #define AS3722_IRQ_SD6_LV       14
0035 #define AS3722_IRQ_RTC_REP      15
0036 #define AS3722_IRQ_RTC_ALARM        16
0037 #define AS3722_IRQ_GPIO1        17
0038 #define AS3722_IRQ_GPIO2        18
0039 #define AS3722_IRQ_GPIO3        19
0040 #define AS3722_IRQ_GPIO4        20
0041 #define AS3722_IRQ_GPIO5        21
0042 #define AS3722_IRQ_WATCHDOG     22
0043 #define AS3722_IRQ_ENABLE3      23
0044 #define AS3722_IRQ_TEMP_SD0_SHUTDOWN    24
0045 #define AS3722_IRQ_TEMP_SD1_SHUTDOWN    25
0046 #define AS3722_IRQ_TEMP_SD2_SHUTDOWN    26
0047 #define AS3722_IRQ_TEMP_SD0_ALARM   27
0048 #define AS3722_IRQ_TEMP_SD1_ALARM   28
0049 #define AS3722_IRQ_TEMP_SD6_ALARM   29
0050 #define AS3722_IRQ_OCCUR_ALARM_SD6  30
0051 #define AS3722_IRQ_ADC          31
0052
0053 #endif /* __DT_BINDINGS_AS3722_H__ */