0001
0002 #ifndef DT_BINDINGS_MEMORY_TEGRA210_MC_H
0003 #define DT_BINDINGS_MEMORY_TEGRA210_MC_H
0004
0005 #define TEGRA_SWGROUP_PTC 0
0006 #define TEGRA_SWGROUP_DC 1
0007 #define TEGRA_SWGROUP_DCB 2
0008 #define TEGRA_SWGROUP_AFI 3
0009 #define TEGRA_SWGROUP_AVPC 4
0010 #define TEGRA_SWGROUP_HDA 5
0011 #define TEGRA_SWGROUP_HC 6
0012 #define TEGRA_SWGROUP_NVENC 7
0013 #define TEGRA_SWGROUP_PPCS 8
0014 #define TEGRA_SWGROUP_SATA 9
0015 #define TEGRA_SWGROUP_MPCORE 10
0016 #define TEGRA_SWGROUP_ISP2 11
0017 #define TEGRA_SWGROUP_XUSB_HOST 12
0018 #define TEGRA_SWGROUP_XUSB_DEV 13
0019 #define TEGRA_SWGROUP_ISP2B 14
0020 #define TEGRA_SWGROUP_TSEC 15
0021 #define TEGRA_SWGROUP_A9AVP 16
0022 #define TEGRA_SWGROUP_GPU 17
0023 #define TEGRA_SWGROUP_SDMMC1A 18
0024 #define TEGRA_SWGROUP_SDMMC2A 19
0025 #define TEGRA_SWGROUP_SDMMC3A 20
0026 #define TEGRA_SWGROUP_SDMMC4A 21
0027 #define TEGRA_SWGROUP_VIC 22
0028 #define TEGRA_SWGROUP_VI 23
0029 #define TEGRA_SWGROUP_NVDEC 24
0030 #define TEGRA_SWGROUP_APE 25
0031 #define TEGRA_SWGROUP_NVJPG 26
0032 #define TEGRA_SWGROUP_SE 27
0033 #define TEGRA_SWGROUP_AXIAP 28
0034 #define TEGRA_SWGROUP_ETR 29
0035 #define TEGRA_SWGROUP_TSECB 30
0036 #define TEGRA_SWGROUP_NV 31
0037 #define TEGRA_SWGROUP_NV2 32
0038 #define TEGRA_SWGROUP_PPCS1 33
0039 #define TEGRA_SWGROUP_DC1 34
0040 #define TEGRA_SWGROUP_PPCS2 35
0041 #define TEGRA_SWGROUP_HC1 36
0042 #define TEGRA_SWGROUP_SE1 37
0043 #define TEGRA_SWGROUP_TSEC1 38
0044 #define TEGRA_SWGROUP_TSECB1 39
0045 #define TEGRA_SWGROUP_NVDEC1 40
0046
0047 #define TEGRA210_MC_RESET_AFI 0
0048 #define TEGRA210_MC_RESET_AVPC 1
0049 #define TEGRA210_MC_RESET_DC 2
0050 #define TEGRA210_MC_RESET_DCB 3
0051 #define TEGRA210_MC_RESET_HC 4
0052 #define TEGRA210_MC_RESET_HDA 5
0053 #define TEGRA210_MC_RESET_ISP2 6
0054 #define TEGRA210_MC_RESET_MPCORE 7
0055 #define TEGRA210_MC_RESET_NVENC 8
0056 #define TEGRA210_MC_RESET_PPCS 9
0057 #define TEGRA210_MC_RESET_SATA 10
0058 #define TEGRA210_MC_RESET_VI 11
0059 #define TEGRA210_MC_RESET_VIC 12
0060 #define TEGRA210_MC_RESET_XUSB_HOST 13
0061 #define TEGRA210_MC_RESET_XUSB_DEV 14
0062 #define TEGRA210_MC_RESET_A9AVP 15
0063 #define TEGRA210_MC_RESET_TSEC 16
0064 #define TEGRA210_MC_RESET_SDMMC1 17
0065 #define TEGRA210_MC_RESET_SDMMC2 18
0066 #define TEGRA210_MC_RESET_SDMMC3 19
0067 #define TEGRA210_MC_RESET_SDMMC4 20
0068 #define TEGRA210_MC_RESET_ISP2B 21
0069 #define TEGRA210_MC_RESET_GPU 22
0070 #define TEGRA210_MC_RESET_NVDEC 23
0071 #define TEGRA210_MC_RESET_APE 24
0072 #define TEGRA210_MC_RESET_SE 25
0073 #define TEGRA210_MC_RESET_NVJPG 26
0074 #define TEGRA210_MC_RESET_AXIAP 27
0075 #define TEGRA210_MC_RESET_ETR 28
0076 #define TEGRA210_MC_RESET_TSECB 29
0077
0078 #endif
