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0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Xilinx Video IP Core
0004  *
0005  * Copyright (C) 2013-2015 Ideas on Board
0006  * Copyright (C) 2013-2015 Xilinx, Inc.
0007  *
0008  * Contacts: Hyun Kwon <hyun.kwon@xilinx.com>
0009  *           Laurent Pinchart <laurent.pinchart@ideasonboard.com>
0010  */
0011 
0012 #ifndef __DT_BINDINGS_MEDIA_XILINX_VIP_H__
0013 #define __DT_BINDINGS_MEDIA_XILINX_VIP_H__
0014 
0015 /*
0016  * Video format codes as defined in "AXI4-Stream Video IP and System Design
0017  * Guide".
0018  */
0019 #define XVIP_VF_YUV_422         0
0020 #define XVIP_VF_YUV_444         1
0021 #define XVIP_VF_RBG         2
0022 #define XVIP_VF_YUV_420         3
0023 #define XVIP_VF_YUVA_422        4
0024 #define XVIP_VF_YUVA_444        5
0025 #define XVIP_VF_RGBA            6
0026 #define XVIP_VF_YUVA_420        7
0027 #define XVIP_VF_YUVD_422        8
0028 #define XVIP_VF_YUVD_444        9
0029 #define XVIP_VF_RGBD            10
0030 #define XVIP_VF_YUVD_420        11
0031 #define XVIP_VF_MONO_SENSOR     12
0032 #define XVIP_VF_CUSTOM2         13
0033 #define XVIP_VF_CUSTOM3         14
0034 #define XVIP_VF_CUSTOM4         15
0035 
0036 #endif /* __DT_BINDINGS_MEDIA_XILINX_VIP_H__ */