dt-bindings/interconnect/qcom%2Cqcs404.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Qualcomm interconnect IDs
0004  *
0005  * Copyright (c) 2019, Linaro Ltd.
0006  * Author: Georgi Djakov <georgi.djakov@linaro.org>
0007  */
0008
0009 #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_QCS404_H
0010 #define __DT_BINDINGS_INTERCONNECT_QCOM_QCS404_H
0011
0012 #define MASTER_AMPSS_M0         0
0013 #define MASTER_OXILI            1
0014 #define MASTER_MDP_PORT0        2
0015 #define MASTER_SNOC_BIMC_1      3
0016 #define MASTER_TCU_0            4
0017 #define SLAVE_EBI_CH0           5
0018 #define SLAVE_BIMC_SNOC         6
0019
0020 #define MASTER_SPDM         0
0021 #define MASTER_BLSP_1           1
0022 #define MASTER_BLSP_2           2
0023 #define MASTER_XI_USB_HS1       3
0024 #define MASTER_CRYPT0           4
0025 #define MASTER_SDCC_1           5
0026 #define MASTER_SDCC_2           6
0027 #define MASTER_SNOC_PCNOC       7
0028 #define MASTER_QPIC         8
0029 #define PCNOC_INT_0         9
0030 #define PCNOC_INT_2         10
0031 #define PCNOC_INT_3         11
0032 #define PCNOC_S_0           12
0033 #define PCNOC_S_1           13
0034 #define PCNOC_S_2           14
0035 #define PCNOC_S_3           15
0036 #define PCNOC_S_4           16
0037 #define PCNOC_S_6           17
0038 #define PCNOC_S_7           18
0039 #define PCNOC_S_8           19
0040 #define PCNOC_S_9           20
0041 #define PCNOC_S_10          21
0042 #define PCNOC_S_11          22
0043 #define SLAVE_SPDM          23
0044 #define SLAVE_PDM           24
0045 #define SLAVE_PRNG          25
0046 #define SLAVE_TCSR          26
0047 #define SLAVE_SNOC_CFG          27
0048 #define SLAVE_MESSAGE_RAM       28
0049 #define SLAVE_DISP_SS_CFG       29
0050 #define SLAVE_GPU_CFG           30
0051 #define SLAVE_BLSP_1            31
0052 #define SLAVE_BLSP_2            32
0053 #define SLAVE_TLMM_NORTH        33
0054 #define SLAVE_PCIE          34
0055 #define SLAVE_ETHERNET          35
0056 #define SLAVE_TLMM_EAST         36
0057 #define SLAVE_TCU           37
0058 #define SLAVE_PMIC_ARB          38
0059 #define SLAVE_SDCC_1            39
0060 #define SLAVE_SDCC_2            40
0061 #define SLAVE_TLMM_SOUTH        41
0062 #define SLAVE_USB_HS            42
0063 #define SLAVE_USB3          43
0064 #define SLAVE_CRYPTO_0_CFG      44
0065 #define SLAVE_PCNOC_SNOC        45
0066
0067 #define MASTER_QDSS_BAM         0
0068 #define MASTER_BIMC_SNOC        1
0069 #define MASTER_PCNOC_SNOC       2
0070 #define MASTER_QDSS_ETR         3
0071 #define MASTER_EMAC         4
0072 #define MASTER_PCIE         5
0073 #define MASTER_USB3         6
0074 #define QDSS_INT            7
0075 #define SNOC_INT_0          8
0076 #define SNOC_INT_1          9
0077 #define SNOC_INT_2          10
0078 #define SLAVE_KPSS_AHB          11
0079 #define SLAVE_WCSS          12
0080 #define SLAVE_SNOC_BIMC_1       13
0081 #define SLAVE_IMEM          14
0082 #define SLAVE_SNOC_PCNOC        15
0083 #define SLAVE_QDSS_STM          16
0084 #define SLAVE_CATS_0            17
0085 #define SLAVE_CATS_1            18
0086 #define SLAVE_LPASS         19
0087
0088 #endif