dt-bindings/gpio/tegra241-gpio.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /* Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved. */
0003
0004 /*
0005  * This header provides constants for the nvidia,tegra241-gpio DT binding.
0006  *
0007  * The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below
0008  * provide names for this.
0009  *
0010  * The second cell contains standard flag values specified in gpio.h.
0011  */
0012
0013 #ifndef _DT_BINDINGS_GPIO_TEGRA241_GPIO_H
0014 #define _DT_BINDINGS_GPIO_TEGRA241_GPIO_H
0015
0016 #include <dt-bindings/gpio/gpio.h>
0017
0018 /* GPIOs implemented by main GPIO controller */
0019 #define TEGRA241_MAIN_GPIO_PORT_A 0
0020 #define TEGRA241_MAIN_GPIO_PORT_B 1
0021 #define TEGRA241_MAIN_GPIO_PORT_C 2
0022 #define TEGRA241_MAIN_GPIO_PORT_D 3
0023 #define TEGRA241_MAIN_GPIO_PORT_E 4
0024 #define TEGRA241_MAIN_GPIO_PORT_F 5
0025 #define TEGRA241_MAIN_GPIO_PORT_G 6
0026 #define TEGRA241_MAIN_GPIO_PORT_H 7
0027 #define TEGRA241_MAIN_GPIO_PORT_I 8
0028 #define TEGRA241_MAIN_GPIO_PORT_J 9
0029 #define TEGRA241_MAIN_GPIO_PORT_K 10
0030 #define TEGRA241_MAIN_GPIO_PORT_L 11
0031
0032 #define TEGRA241_MAIN_GPIO(port, offset) \
0033     ((TEGRA241_MAIN_GPIO_PORT_##port * 8) + (offset))
0034
0035 /* GPIOs implemented by AON GPIO controller */
0036 #define TEGRA241_AON_GPIO_PORT_AA 0
0037 #define TEGRA241_AON_GPIO_PORT_BB 1
0038
0039 #define TEGRA241_AON_GPIO(port, offset) \
0040     ((TEGRA241_AON_GPIO_PORT_##port * 8) + (offset))
0041
0042 #endif