Back to home page

OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Copyright (c) 2020 MediaTek Inc.
0004  * Author: Yongqiang Niu <yongqiang.niu@mediatek.com>
0005  */
0006 
0007 #ifndef _DT_BINDINGS_GCE_MT8192_H
0008 #define _DT_BINDINGS_GCE_MT8192_H
0009 
0010 /* assign timeout 0 also means default */
0011 #define CMDQ_NO_TIMEOUT     0xffffffff
0012 #define CMDQ_TIMEOUT_DEFAULT    1000
0013 
0014 /* GCE thread priority */
0015 #define CMDQ_THR_PRIO_LOWEST    0
0016 #define CMDQ_THR_PRIO_1     1
0017 #define CMDQ_THR_PRIO_2     2
0018 #define CMDQ_THR_PRIO_3     3
0019 #define CMDQ_THR_PRIO_4     4
0020 #define CMDQ_THR_PRIO_5     5
0021 #define CMDQ_THR_PRIO_6     6
0022 #define CMDQ_THR_PRIO_HIGHEST   7
0023 
0024 /* CPR count in 32bit register */
0025 #define GCE_CPR_COUNT       1312
0026 
0027 /* GCE subsys table */
0028 #define SUBSYS_1300XXXX     0
0029 #define SUBSYS_1400XXXX     1
0030 #define SUBSYS_1401XXXX     2
0031 #define SUBSYS_1402XXXX     3
0032 #define SUBSYS_1502XXXX     4
0033 #define SUBSYS_1880XXXX     5
0034 #define SUBSYS_1881XXXX     6
0035 #define SUBSYS_1882XXXX     7
0036 #define SUBSYS_1883XXXX     8
0037 #define SUBSYS_1884XXXX     9
0038 #define SUBSYS_1000XXXX     10
0039 #define SUBSYS_1001XXXX     11
0040 #define SUBSYS_1002XXXX     12
0041 #define SUBSYS_1003XXXX     13
0042 #define SUBSYS_1004XXXX     14
0043 #define SUBSYS_1005XXXX     15
0044 #define SUBSYS_1020XXXX     16
0045 #define SUBSYS_1028XXXX     17
0046 #define SUBSYS_1700XXXX     18
0047 #define SUBSYS_1701XXXX     19
0048 #define SUBSYS_1702XXXX     20
0049 #define SUBSYS_1703XXXX     21
0050 #define SUBSYS_1800XXXX     22
0051 #define SUBSYS_1801XXXX     23
0052 #define SUBSYS_1802XXXX     24
0053 #define SUBSYS_1804XXXX     25
0054 #define SUBSYS_1805XXXX     26
0055 #define SUBSYS_1808XXXX     27
0056 #define SUBSYS_180aXXXX     28
0057 #define SUBSYS_180bXXXX     29
0058 
0059 #define CMDQ_EVENT_VDEC_LAT_SOF_0           0
0060 #define CMDQ_EVENT_VDEC_LAT_FRAME_DONE_0        1
0061 #define CMDQ_EVENT_VDEC_LAT_FRAME_DONE_1        2
0062 #define CMDQ_EVENT_VDEC_LAT_FRAME_DONE_2        3
0063 #define CMDQ_EVENT_VDEC_LAT_FRAME_DONE_3        4
0064 #define CMDQ_EVENT_VDEC_LAT_FRAME_DONE_4        5
0065 #define CMDQ_EVENT_VDEC_LAT_FRAME_DONE_5        6
0066 #define CMDQ_EVENT_VDEC_LAT_FRAME_DONE_6        7
0067 #define CMDQ_EVENT_VDEC_LAT_ENG_EVENT_0         8
0068 #define CMDQ_EVENT_VDEC_LAT_ENG_EVENT_1         9
0069 #define CMDQ_EVENT_VDEC_LAT_ENG_EVENT_2         10
0070 #define CMDQ_EVENT_VDEC_LAT_ENG_EVENT_3         11
0071 #define CMDQ_EVENT_VDEC_LAT_ENG_EVENT_4         12
0072 #define CMDQ_EVENT_VDEC_LAT_ENG_EVENT_5         13
0073 #define CMDQ_EVENT_VDEC_LAT_ENG_EVENT_6         14
0074 #define CMDQ_EVENT_VDEC_LAT_ENG_EVENT_7         15
0075 
0076 #define CMDQ_EVENT_ISP_FRAME_DONE_A         65
0077 #define CMDQ_EVENT_ISP_FRAME_DONE_B         66
0078 #define CMDQ_EVENT_ISP_FRAME_DONE_C         67
0079 #define CMDQ_EVENT_CAMSV0_PASS1_DONE            68
0080 #define CMDQ_EVENT_CAMSV02_PASS1_DONE           69
0081 #define CMDQ_EVENT_CAMSV1_PASS1_DONE            70
0082 #define CMDQ_EVENT_CAMSV2_PASS1_DONE            71
0083 #define CMDQ_EVENT_CAMSV3_PASS1_DONE            72
0084 #define CMDQ_EVENT_MRAW_0_PASS1_DONE            73
0085 #define CMDQ_EVENT_MRAW_1_PASS1_DONE            74
0086 #define CMDQ_EVENT_SENINF_CAM0_FIFO_FULL        75
0087 #define CMDQ_EVENT_SENINF_CAM1_FIFO_FULL        76
0088 #define CMDQ_EVENT_SENINF_CAM2_FIFO_FULL        77
0089 #define CMDQ_EVENT_SENINF_CAM3_FIFO_FULL        78
0090 #define CMDQ_EVENT_SENINF_CAM4_FIFO_FULL        79
0091 #define CMDQ_EVENT_SENINF_CAM5_FIFO_FULL        80
0092 #define CMDQ_EVENT_SENINF_CAM6_FIFO_FULL        81
0093 #define CMDQ_EVENT_SENINF_CAM7_FIFO_FULL        82
0094 #define CMDQ_EVENT_SENINF_CAM8_FIFO_FULL        83
0095 #define CMDQ_EVENT_SENINF_CAM9_FIFO_FULL        84
0096 #define CMDQ_EVENT_SENINF_CAM10_FIFO_FULL       85
0097 #define CMDQ_EVENT_SENINF_CAM11_FIFO_FULL       86
0098 #define CMDQ_EVENT_SENINF_CAM12_FIFO_FULL       87
0099 #define CMDQ_EVENT_TG_OVRUN_A_INT           88
0100 #define CMDQ_EVENT_DMA_R1_ERROR_A_INT           89
0101 #define CMDQ_EVENT_TG_OVRUN_B_INT           90
0102 #define CMDQ_EVENT_DMA_R1_ERROR_B_INT           91
0103 #define CMDQ_EVENT_TG_OVRUN_C_INT           92
0104 #define CMDQ_EVENT_DMA_R1_ERROR_C_INT           93
0105 #define CMDQ_EVENT_TG_OVRUN_M0_INT          94
0106 #define CMDQ_EVENT_DMA_R1_ERROR_M0_INT          95
0107 #define CMDQ_EVENT_TG_GRABERR_M0_INT            96
0108 #define CMDQ_EVENT_TG_GRABERR_M1_INT            97
0109 #define CMDQ_EVENT_TG_GRABERR_A_INT         98
0110 #define CMDQ_EVENT_CQ_VR_SNAP_A_INT         99
0111 #define CMDQ_EVENT_TG_GRABERR_B_INT         100
0112 #define CMDQ_EVENT_CQ_VR_SNAP_B_INT         101
0113 #define CMDQ_EVENT_TG_GRABERR_C_INT         102
0114 #define CMDQ_EVENT_CQ_VR_SNAP_C_INT         103
0115 
0116 #define CMDQ_EVENT_VENC_CMDQ_FRAME_DONE         129
0117 #define CMDQ_EVENT_VENC_CMDQ_PAUSE_DONE         130
0118 #define CMDQ_EVENT_JPGENC_CMDQ_DONE         131
0119 #define CMDQ_EVENT_VENC_CMDQ_MB_DONE            132
0120 #define CMDQ_EVENT_VENC_CMDQ_128BYTE_CNT_DONE       133
0121 #define CMDQ_EVENT_VENC_C0_CMDQ_WP_2ND_STAGE_DONE   134
0122 #define CMDQ_EVENT_VENC_C0_CMDQ_WP_3RD_STAGE_DONE   135
0123 #define CMDQ_EVENT_VENC_CMDQ_PPS_DONE           136
0124 #define CMDQ_EVENT_VENC_CMDQ_SPS_DONE           137
0125 #define CMDQ_EVENT_VENC_CMDQ_VPS_DONE           138
0126 
0127 #define CMDQ_EVENT_VDEC_CORE0_SOF_0         160
0128 #define CMDQ_EVENT_VDEC_CORE0_FRAME_DONE_0      161
0129 #define CMDQ_EVENT_VDEC_CORE0_FRAME_DONE_1      162
0130 #define CMDQ_EVENT_VDEC_CORE0_FRAME_DONE_2      163
0131 #define CMDQ_EVENT_VDEC_CORE0_FRAME_DONE_3      164
0132 #define CMDQ_EVENT_VDEC_CORE0_FRAME_DONE_4      165
0133 #define CMDQ_EVENT_VDEC_CORE0_FRAME_DONE_5      166
0134 #define CMDQ_EVENT_VDEC_CORE0_FRAME_DONE_6      167
0135 #define CMDQ_EVENT_VDEC_CORE0_ENG_EVENT_0       168
0136 #define CMDQ_EVENT_VDEC_CORE0_ENG_EVENT_1       169
0137 #define CMDQ_EVENT_VDEC_CORE0_ENG_EVENT_2       170
0138 #define CMDQ_EVENT_VDEC_CORE0_ENG_EVENT_3       171
0139 #define CMDQ_EVENT_VDEC_CORE0_ENG_EVENT_4       172
0140 #define CMDQ_EVENT_VDEC_CORE0_ENG_EVENT_5       173
0141 #define CMDQ_EVENT_VDEC_CORE0_ENG_EVENT_6       174
0142 #define CMDQ_EVENT_VDEC_CORE0_ENG_EVENT_7       175
0143 #define CMDQ_EVENT_FDVT_DONE                177
0144 #define CMDQ_EVENT_FE_DONE              178
0145 #define CMDQ_EVENT_RSC_DONE             179
0146 #define CMDQ_EVENT_DVS_DONE_ASYNC_SHOT          180
0147 #define CMDQ_EVENT_DVP_DONE_ASYNC_SHOT          181
0148 
0149 #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_0     193
0150 #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_1     194
0151 #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_2     195
0152 #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_3     196
0153 #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_4     197
0154 #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_5     198
0155 #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_6     199
0156 #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_7     200
0157 #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_8     201
0158 #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_9     202
0159 #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_10        203
0160 #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_11        204
0161 #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_12        205
0162 #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_13        206
0163 #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_14        207
0164 #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_15        208
0165 #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_16        209
0166 #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_17        210
0167 #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_18        211
0168 #define CMDQ_EVENT_IMG2_DIP_DMA_ERR_EVENT       212
0169 #define CMDQ_EVENT_IMG2_AMD_FRAME_DONE          213
0170 #define CMDQ_EVENT_IMG2_MFB_DONE_LINK_MISC      214
0171 #define CMDQ_EVENT_IMG2_WPE_A_DONE_LINK_MISC        215
0172 #define CMDQ_EVENT_IMG2_MSS_DONE_LINK_MISC      216
0173 
0174 #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_0     225
0175 #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_1     226
0176 #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_2     227
0177 #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_3     228
0178 #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_4     229
0179 #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_5     230
0180 #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_6     231
0181 #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_7     232
0182 #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_8     233
0183 #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_9     234
0184 #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_10        235
0185 #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_11        236
0186 #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_12        237
0187 #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_13        238
0188 #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_14        239
0189 #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_15        240
0190 #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_16        241
0191 #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_17        242
0192 #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_18        243
0193 #define CMDQ_EVENT_IMG1_DIP_DMA_ERR_EVENT       244
0194 #define CMDQ_EVENT_IMG1_AMD_FRAME_DONE          245
0195 #define CMDQ_EVENT_IMG1_MFB_DONE_LINK_MISC      246
0196 #define CMDQ_EVENT_IMG1_WPE_A_DONE_LINK_MISC        247
0197 #define CMDQ_EVENT_IMG1_MSS_DONE_LINK_MISC      248
0198 
0199 #define CMDQ_EVENT_MDP_RDMA0_SOF            256
0200 #define CMDQ_EVENT_MDP_RDMA1_SOF            257
0201 #define CMDQ_EVENT_MDP_AAL0_SOF             258
0202 #define CMDQ_EVENT_MDP_AAL1_SOF             259
0203 #define CMDQ_EVENT_MDP_HDR0_SOF             260
0204 #define CMDQ_EVENT_MDP_HDR1_SOF             261
0205 #define CMDQ_EVENT_MDP_RSZ0_SOF             262
0206 #define CMDQ_EVENT_MDP_RSZ1_SOF             263
0207 #define CMDQ_EVENT_MDP_WROT0_SOF            264
0208 #define CMDQ_EVENT_MDP_WROT1_SOF            265
0209 #define CMDQ_EVENT_MDP_TDSHP0_SOF           266
0210 #define CMDQ_EVENT_MDP_TDSHP1_SOF           267
0211 #define CMDQ_EVENT_IMG_DL_RELAY0_SOF            268
0212 #define CMDQ_EVENT_IMG_DL_RELAY1_SOF            269
0213 #define CMDQ_EVENT_MDP_COLOR0_SOF           270
0214 #define CMDQ_EVENT_MDP_COLOR1_SOF           271
0215 #define CMDQ_EVENT_MDP_WROT1_FRAME_DONE         290
0216 #define CMDQ_EVENT_MDP_WROT0_FRAME_DONE         291
0217 #define CMDQ_EVENT_MDP_TDSHP1_FRAME_DONE        294
0218 #define CMDQ_EVENT_MDP_TDSHP0_FRAME_DONE        295
0219 #define CMDQ_EVENT_MDP_RSZ1_FRAME_DONE          302
0220 #define CMDQ_EVENT_MDP_RSZ0_FRAME_DONE          303
0221 #define CMDQ_EVENT_MDP_RDMA1_FRAME_DONE         306
0222 #define CMDQ_EVENT_MDP_RDMA0_FRAME_DONE         307
0223 #define CMDQ_EVENT_MDP_HDR1_FRAME_DONE          308
0224 #define CMDQ_EVENT_MDP_HDR0_FRAME_DONE          309
0225 #define CMDQ_EVENT_MDP_COLOR1_FRAME_DONE        312
0226 #define CMDQ_EVENT_MDP_COLOR0_FRAME_DONE        313
0227 #define CMDQ_EVENT_MDP_AAL1_FRAME_DONE          316
0228 #define CMDQ_EVENT_MDP_AAL0_FRAME_DONE          317
0229 #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_0      320
0230 #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_1      321
0231 #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_2      322
0232 #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_3      323
0233 #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_4      324
0234 #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_5      325
0235 #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_6      326
0236 #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_7      327
0237 #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_8      328
0238 #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_9      329
0239 #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_10     330
0240 #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_11     331
0241 #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_12     332
0242 #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_13     333
0243 #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_14     334
0244 #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_15     335
0245 #define CMDQ_EVENT_MDP_WROT1_SW_RST_DONE_ENG_EVENT  338
0246 #define CMDQ_EVENT_MDP_WROT0_SW_RST_DONE_ENG_EVENT  339
0247 #define CMDQ_EVENT_MDP_RDMA1_SW_RST_DONE_ENG_EVENT  342
0248 #define CMDQ_EVENT_MDP_RDMA0_SW_RST_DONE_ENG_EVENT  343
0249 
0250 #define CMDQ_EVENT_DISP_OVL0_SOF            384
0251 #define CMDQ_EVENT_DISP_OVL0_2L_SOF         385
0252 #define CMDQ_EVENT_DISP_RDMA0_SOF           386
0253 #define CMDQ_EVENT_DISP_RSZ0_SOF            387
0254 #define CMDQ_EVENT_DISP_COLOR0_SOF          388
0255 #define CMDQ_EVENT_DISP_CCORR0_SOF          389
0256 #define CMDQ_EVENT_DISP_AAL0_SOF            390
0257 #define CMDQ_EVENT_DISP_GAMMA0_SOF          391
0258 #define CMDQ_EVENT_DISP_POSTMASK0_SOF           392
0259 #define CMDQ_EVENT_DISP_DITHER0_SOF         393
0260 #define CMDQ_EVENT_DISP_DSC_WRAP0_CORE0_SOF     394
0261 #define CMDQ_EVENT_DISP_DSC_WRAP0_CORE1_SOF     395
0262 #define CMDQ_EVENT_DSI0_SOF             396
0263 #define CMDQ_EVENT_DISP_WDMA0_SOF           397
0264 #define CMDQ_EVENT_DISP_UFBC_WDMA0_SOF          398
0265 #define CMDQ_EVENT_DISP_PWM0_SOF            399
0266 #define CMDQ_EVENT_DISP_OVL2_2L_SOF         400
0267 #define CMDQ_EVENT_DISP_RDMA4_SOF           401
0268 #define CMDQ_EVENT_DISP_DPI0_SOF            402
0269 #define CMDQ_EVENT_MDP_RDMA4_SOF            403
0270 #define CMDQ_EVENT_MDP_HDR4_SOF             404
0271 #define CMDQ_EVENT_MDP_RSZ4_SOF             405
0272 #define CMDQ_EVENT_MDP_AAL4_SOF             406
0273 #define CMDQ_EVENT_MDP_TDSHP4_SOF           407
0274 #define CMDQ_EVENT_MDP_COLOR4_SOF           408
0275 #define CMDQ_EVENT_DISP_Y2R0_SOF            409
0276 #define CMDQ_EVENT_MDP_TDSHP4_FRAME_DONE        410
0277 #define CMDQ_EVENT_MDP_RSZ4_FRAME_DONE          411
0278 #define CMDQ_EVENT_MDP_RDMA4_FRAME_DONE         412
0279 #define CMDQ_EVENT_MDP_HDR4_FRAME_DONE          413
0280 #define CMDQ_EVENT_MDP_COLOR4_FRAME_DONE        414
0281 #define CMDQ_EVENT_MDP_AAL4_FRAME_DONE          415
0282 #define CMDQ_EVENT_DSI0_FRAME_DONE          416
0283 #define CMDQ_EVENT_DISP_WDMA0_FRAME_DONE        417
0284 #define CMDQ_EVENT_DISP_UFBC_WDMA0_FRAME_DONE       418
0285 #define CMDQ_EVENT_DISP_RSZ0_FRAME_DONE         419
0286 #define CMDQ_EVENT_DISP_RDMA4_FRAME_DONE        420
0287 #define CMDQ_EVENT_DISP_RDMA0_FRAME_DONE        421
0288 #define CMDQ_EVENT_DISP_POSTMASK0_FRAME_DONE        422
0289 #define CMDQ_EVENT_DISP_OVL2_2L_FRAME_DONE      423
0290 #define CMDQ_EVENT_DISP_OVL0_FRAME_DONE         424
0291 #define CMDQ_EVENT_DISP_OVL0_2L_FRAME_DONE      425
0292 #define CMDQ_EVENT_DISP_GAMMA0_FRAME_DONE       426
0293 #define CMDQ_EVENT_DISP_DSC_WRAP0_CORE1_FRAME_DONE  427
0294 #define CMDQ_EVENT_DISP_DSC_WRAP0_CORE0_FRAME_DONE  428
0295 #define CMDQ_EVENT_DISP_DPI0_FRAME_DONE         429
0296 #define CMDQ_EVENT_DISP_DITHER0_FRAME_DONE      430
0297 #define CMDQ_EVENT_DISP_COLOR0_FRAME_DONE       431
0298 #define CMDQ_EVENT_DISP_CCORR0_FRAME_DONE       432
0299 #define CMDQ_EVENT_DISP_AAL0_FRAME_DONE         433
0300 #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_0     434
0301 #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_1     435
0302 #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_2     436
0303 #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_3     437
0304 #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_4     438
0305 #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_5     439
0306 #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_6     440
0307 #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_7     441
0308 #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_8     442
0309 #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_9     443
0310 #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_10    444
0311 #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_11    445
0312 #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_12    446
0313 #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_13    447
0314 #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_14    448
0315 #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_15    449
0316 #define CMDQ_EVENT_DSI0_TE_ENG_EVENT            450
0317 #define CMDQ_EVENT_DSI0_IRQ_ENG_EVENT           451
0318 #define CMDQ_EVENT_DSI0_DONE_ENG_EVENT          452
0319 #define CMDQ_EVENT_DISP_WDMA0_SW_RST_DONE_ENG_EVENT 453
0320 #define CMDQ_EVENT_DISP_SMIASSERT_ENG_EVENT     454
0321 #define CMDQ_EVENT_DISP_POSTMASK0_RST_DONE_ENG_EVENT    455
0322 #define CMDQ_EVENT_DISP_OVL2_2L_RST_DONE_ENG_EVENT  456
0323 #define CMDQ_EVENT_DISP_OVL0_RST_DONE_ENG_EVENT     457
0324 #define CMDQ_EVENT_DISP_OVL0_2L_RST_DONE_ENG_EVENT  458
0325 #define CMDQ_EVENT_BUF_UNDERRUN_ENG_EVENT_0     459
0326 #define CMDQ_EVENT_BUF_UNDERRUN_ENG_EVENT_1     460
0327 #define CMDQ_EVENT_BUF_UNDERRUN_ENG_EVENT_2     461
0328 #define CMDQ_EVENT_BUF_UNDERRUN_ENG_EVENT_3     462
0329 #define CMDQ_EVENT_BUF_UNDERRUN_ENG_EVENT_4     463
0330 #define CMDQ_EVENT_BUF_UNDERRUN_ENG_EVENT_5     464
0331 #define CMDQ_EVENT_BUF_UNDERRUN_ENG_EVENT_6     465
0332 #define CMDQ_EVENT_BUF_UNDERRUN_ENG_EVENT_7     466
0333 #define CMDQ_MAX_HW_EVENT               512
0334 
0335 #endif