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0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * This header provides macros for X2000 DMA bindings.
0004  *
0005  * Copyright (c) 2020 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
0006  */
0007 
0008 #ifndef __DT_BINDINGS_DMA_X2000_DMA_H__
0009 #define __DT_BINDINGS_DMA_X2000_DMA_H__
0010 
0011 /*
0012  * Request type numbers for the X2000 DMA controller (written to the DRTn
0013  * register for the channel).
0014  */
0015 #define X2000_DMA_AUTO      0x8
0016 #define X2000_DMA_UART5_TX  0xa
0017 #define X2000_DMA_UART5_RX  0xb
0018 #define X2000_DMA_UART4_TX  0xc
0019 #define X2000_DMA_UART4_RX  0xd
0020 #define X2000_DMA_UART3_TX  0xe
0021 #define X2000_DMA_UART3_RX  0xf
0022 #define X2000_DMA_UART2_TX  0x10
0023 #define X2000_DMA_UART2_RX  0x11
0024 #define X2000_DMA_UART1_TX  0x12
0025 #define X2000_DMA_UART1_RX  0x13
0026 #define X2000_DMA_UART0_TX  0x14
0027 #define X2000_DMA_UART0_RX  0x15
0028 #define X2000_DMA_SSI0_TX   0x16
0029 #define X2000_DMA_SSI0_RX   0x17
0030 #define X2000_DMA_SSI1_TX   0x18
0031 #define X2000_DMA_SSI1_RX   0x19
0032 #define X2000_DMA_I2C0_TX   0x24
0033 #define X2000_DMA_I2C0_RX   0x25
0034 #define X2000_DMA_I2C1_TX   0x26
0035 #define X2000_DMA_I2C1_RX   0x27
0036 #define X2000_DMA_I2C2_TX   0x28
0037 #define X2000_DMA_I2C2_RX   0x29
0038 #define X2000_DMA_I2C3_TX   0x2a
0039 #define X2000_DMA_I2C3_RX   0x2b
0040 #define X2000_DMA_I2C4_TX   0x2c
0041 #define X2000_DMA_I2C4_RX   0x2d
0042 #define X2000_DMA_I2C5_TX   0x2e
0043 #define X2000_DMA_I2C5_RX   0x2f
0044 #define X2000_DMA_UART6_TX  0x30
0045 #define X2000_DMA_UART6_RX  0x31
0046 #define X2000_DMA_UART7_TX  0x32
0047 #define X2000_DMA_UART7_RX  0x33
0048 #define X2000_DMA_UART8_TX  0x34
0049 #define X2000_DMA_UART8_RX  0x35
0050 #define X2000_DMA_UART9_TX  0x36
0051 #define X2000_DMA_UART9_RX  0x37
0052 #define X2000_DMA_SADC_RX   0x38
0053 
0054 #endif /* __DT_BINDINGS_DMA_X2000_DMA_H__ */