dt-bindings/dma/x1830-dma.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * This header provides macros for X1830 DMA bindings.
0004  *
0005  * Copyright (c) 2019 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
0006  */
0007
0008 #ifndef __DT_BINDINGS_DMA_X1830_DMA_H__
0009 #define __DT_BINDINGS_DMA_X1830_DMA_H__
0010
0011 /*
0012  * Request type numbers for the X1830 DMA controller (written to the DRTn
0013  * register for the channel).
0014  */
0015 #define X1830_DMA_I2S0_TX   0x6
0016 #define X1830_DMA_I2S0_RX   0x7
0017 #define X1830_DMA_AUTO      0x8
0018 #define X1830_DMA_SADC_RX   0x9
0019 #define X1830_DMA_UART1_TX  0x12
0020 #define X1830_DMA_UART1_RX  0x13
0021 #define X1830_DMA_UART0_TX  0x14
0022 #define X1830_DMA_UART0_RX  0x15
0023 #define X1830_DMA_SSI0_TX   0x16
0024 #define X1830_DMA_SSI0_RX   0x17
0025 #define X1830_DMA_SSI1_TX   0x18
0026 #define X1830_DMA_SSI1_RX   0x19
0027 #define X1830_DMA_MSC0_TX   0x1a
0028 #define X1830_DMA_MSC0_RX   0x1b
0029 #define X1830_DMA_MSC1_TX   0x1c
0030 #define X1830_DMA_MSC1_RX   0x1d
0031 #define X1830_DMA_DMIC_RX   0x21
0032 #define X1830_DMA_SMB0_TX   0x24
0033 #define X1830_DMA_SMB0_RX   0x25
0034 #define X1830_DMA_SMB1_TX   0x26
0035 #define X1830_DMA_SMB1_RX   0x27
0036 #define X1830_DMA_DES_TX    0x2e
0037 #define X1830_DMA_DES_RX    0x2f
0038
0039 #endif /* __DT_BINDINGS_DMA_X1830_DMA_H__ */