dt-bindings/clock/suniv-ccu-f1c100s.h

0001 /* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002  *
0003  * Copyright (c) 2018 Icenowy Zheng <icenowy@aosc.xyz>
0004  *
0005  */
0006
0007 #ifndef _DT_BINDINGS_CLK_SUNIV_F1C100S_H_
0008 #define _DT_BINDINGS_CLK_SUNIV_F1C100S_H_
0009
0010 #define CLK_CPU         11
0011
0012 #define CLK_BUS_DMA     14
0013 #define CLK_BUS_MMC0        15
0014 #define CLK_BUS_MMC1        16
0015 #define CLK_BUS_DRAM        17
0016 #define CLK_BUS_SPI0        18
0017 #define CLK_BUS_SPI1        19
0018 #define CLK_BUS_OTG     20
0019 #define CLK_BUS_VE      21
0020 #define CLK_BUS_LCD     22
0021 #define CLK_BUS_DEINTERLACE 23
0022 #define CLK_BUS_CSI     24
0023 #define CLK_BUS_TVD     25
0024 #define CLK_BUS_TVE     26
0025 #define CLK_BUS_DE_BE       27
0026 #define CLK_BUS_DE_FE       28
0027 #define CLK_BUS_CODEC       29
0028 #define CLK_BUS_SPDIF       30
0029 #define CLK_BUS_IR      31
0030 #define CLK_BUS_RSB     32
0031 #define CLK_BUS_I2S0        33
0032 #define CLK_BUS_I2C0        34
0033 #define CLK_BUS_I2C1        35
0034 #define CLK_BUS_I2C2        36
0035 #define CLK_BUS_PIO     37
0036 #define CLK_BUS_UART0       38
0037 #define CLK_BUS_UART1       39
0038 #define CLK_BUS_UART2       40
0039
0040 #define CLK_MMC0        41
0041 #define CLK_MMC0_SAMPLE     42
0042 #define CLK_MMC0_OUTPUT     43
0043 #define CLK_MMC1        44
0044 #define CLK_MMC1_SAMPLE     45
0045 #define CLK_MMC1_OUTPUT     46
0046 #define CLK_I2S         47
0047 #define CLK_SPDIF       48
0048
0049 #define CLK_USB_PHY0        49
0050
0051 #define CLK_DRAM_VE     50
0052 #define CLK_DRAM_CSI        51
0053 #define CLK_DRAM_DEINTERLACE    52
0054 #define CLK_DRAM_TVD        53
0055 #define CLK_DRAM_DE_FE      54
0056 #define CLK_DRAM_DE_BE      55
0057
0058 #define CLK_DE_BE       56
0059 #define CLK_DE_FE       57
0060 #define CLK_TCON        58
0061 #define CLK_DEINTERLACE     59
0062 #define CLK_TVE2_CLK        60
0063 #define CLK_TVE1_CLK        61
0064 #define CLK_TVD         62
0065 #define CLK_CSI         63
0066 #define CLK_VE          64
0067 #define CLK_CODEC       65
0068 #define CLK_AVS         66
0069
0070 #endif