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0043 #ifndef _DT_BINDINGS_CLOCK_SUN9I_A80_CCU_H_
0044 #define _DT_BINDINGS_CLOCK_SUN9I_A80_CCU_H_
0045
0046 #define CLK_PLL_AUDIO 2
0047 #define CLK_PLL_PERIPH0 3
0048
0049 #define CLK_C0CPUX 12
0050 #define CLK_C1CPUX 13
0051
0052 #define CLK_OUT_A 27
0053 #define CLK_OUT_B 28
0054
0055 #define CLK_NAND0_0 29
0056 #define CLK_NAND0_1 30
0057 #define CLK_NAND1_0 31
0058 #define CLK_NAND1_1 32
0059 #define CLK_MMC0 33
0060 #define CLK_MMC0_SAMPLE 34
0061 #define CLK_MMC0_OUTPUT 35
0062 #define CLK_MMC1 36
0063 #define CLK_MMC1_SAMPLE 37
0064 #define CLK_MMC1_OUTPUT 38
0065 #define CLK_MMC2 39
0066 #define CLK_MMC2_SAMPLE 40
0067 #define CLK_MMC2_OUTPUT 41
0068 #define CLK_MMC3 42
0069 #define CLK_MMC3_SAMPLE 43
0070 #define CLK_MMC3_OUTPUT 44
0071 #define CLK_TS 45
0072 #define CLK_SS 46
0073 #define CLK_SPI0 47
0074 #define CLK_SPI1 48
0075 #define CLK_SPI2 49
0076 #define CLK_SPI3 50
0077 #define CLK_I2S0 51
0078 #define CLK_I2S1 52
0079 #define CLK_SPDIF 53
0080 #define CLK_SDRAM 54
0081 #define CLK_DE 55
0082 #define CLK_EDP 56
0083 #define CLK_MP 57
0084 #define CLK_LCD0 58
0085 #define CLK_LCD1 59
0086 #define CLK_MIPI_DSI0 60
0087 #define CLK_MIPI_DSI1 61
0088 #define CLK_HDMI 62
0089 #define CLK_HDMI_SLOW 63
0090 #define CLK_MIPI_CSI 64
0091 #define CLK_CSI_ISP 65
0092 #define CLK_CSI_MISC 66
0093 #define CLK_CSI0_MCLK 67
0094 #define CLK_CSI1_MCLK 68
0095 #define CLK_FD 69
0096 #define CLK_VE 70
0097 #define CLK_AVS 71
0098 #define CLK_GPU_CORE 72
0099 #define CLK_GPU_MEMORY 73
0100 #define CLK_GPU_AXI 74
0101 #define CLK_SATA 75
0102 #define CLK_AC97 76
0103 #define CLK_MIPI_HSI 77
0104 #define CLK_GPADC 78
0105 #define CLK_CIR_TX 79
0106
0107 #define CLK_BUS_FD 80
0108 #define CLK_BUS_VE 81
0109 #define CLK_BUS_GPU_CTRL 82
0110 #define CLK_BUS_SS 83
0111 #define CLK_BUS_MMC 84
0112 #define CLK_BUS_NAND0 85
0113 #define CLK_BUS_NAND1 86
0114 #define CLK_BUS_SDRAM 87
0115 #define CLK_BUS_MIPI_HSI 88
0116 #define CLK_BUS_SATA 89
0117 #define CLK_BUS_TS 90
0118 #define CLK_BUS_SPI0 91
0119 #define CLK_BUS_SPI1 92
0120 #define CLK_BUS_SPI2 93
0121 #define CLK_BUS_SPI3 94
0122
0123 #define CLK_BUS_OTG 95
0124 #define CLK_BUS_USB 96
0125 #define CLK_BUS_GMAC 97
0126 #define CLK_BUS_MSGBOX 98
0127 #define CLK_BUS_SPINLOCK 99
0128 #define CLK_BUS_HSTIMER 100
0129 #define CLK_BUS_DMA 101
0130
0131 #define CLK_BUS_LCD0 102
0132 #define CLK_BUS_LCD1 103
0133 #define CLK_BUS_EDP 104
0134 #define CLK_BUS_CSI 105
0135 #define CLK_BUS_HDMI 106
0136 #define CLK_BUS_DE 107
0137 #define CLK_BUS_MP 108
0138 #define CLK_BUS_MIPI_DSI 109
0139
0140 #define CLK_BUS_SPDIF 110
0141 #define CLK_BUS_PIO 111
0142 #define CLK_BUS_AC97 112
0143 #define CLK_BUS_I2S0 113
0144 #define CLK_BUS_I2S1 114
0145 #define CLK_BUS_LRADC 115
0146 #define CLK_BUS_GPADC 116
0147 #define CLK_BUS_TWD 117
0148 #define CLK_BUS_CIR_TX 118
0149
0150 #define CLK_BUS_I2C0 119
0151 #define CLK_BUS_I2C1 120
0152 #define CLK_BUS_I2C2 121
0153 #define CLK_BUS_I2C3 122
0154 #define CLK_BUS_I2C4 123
0155 #define CLK_BUS_UART0 124
0156 #define CLK_BUS_UART1 125
0157 #define CLK_BUS_UART2 126
0158 #define CLK_BUS_UART3 127
0159 #define CLK_BUS_UART4 128
0160 #define CLK_BUS_UART5 129
0161
0162 #endif